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    A high energy-efficiency and low-area switching scheme for SAR ADCs

    , Article Analog Integrated Circuits and Signal Processing ; 18 November , 2020 Momeni, M ; Sharifkhani, M ; Yazdani, S. B ; Sharif University of Technology
    Springer  2020
    Abstract
    A high energy-efficiency and low-area switching method is proposed for the successive approximation register analog-to-digital converters. In the proposed scheme, the threshold voltage for comparison is derived from the charge sharing technique and using a voltage source connected to the bottom plates of the digital-to-analogue converter (DAC) capacitors. The switching method achieves an average DAC switching energy and DAC area reduction of 99.15% and 84.27%, respectively, with respect to the conventional method. The differential nonlinearity and integral nonlinearity of the proposed scheme are 0.1288 LSB and 0.1207 LSB, respectively. In addition, in the proposed method, the number of DAC... 

    A high energy-efficiency and low-area switching scheme for SAR ADCs

    , Article Analog Integrated Circuits and Signal Processing ; Volume 106, Issue 2 , 2021 , Pages 449-457 ; 09251030 (ISSN) Momeni, M ; Sharifkhani, M ; Yazdani, S. B ; Sharif University of Technology
    Springer  2021
    Abstract
    A high energy-efficiency and low-area switching method is proposed for the successive approximation register analog-to-digital converters. In the proposed scheme, the threshold voltage for comparison is derived from the charge sharing technique and using a voltage source connected to the bottom plates of the digital-to-analogue converter (DAC) capacitors. The switching method achieves an average DAC switching energy and DAC area reduction of 99.15% and 84.27%, respectively, with respect to the conventional method. The differential nonlinearity and integral nonlinearity of the proposed scheme are 0.1288 LSB and 0.1207 LSB, respectively. In addition, in the proposed method, the number of DAC... 

    An ultra low-power DAC with fixed output common mode voltage

    , Article AEU - International Journal of Electronics and Communications ; Volume 96 , 2018 , Pages 279-293 ; 14348411 (ISSN) Khorami, A ; Saeidi, R ; Sharifkhani, M ; Sharif University of Technology
    Elsevier GmbH  2018
    Abstract
    A novel structure of Capacitive Digital to Analog Converters (CDAC) for Successive Approximation Register Analog to Digital Converters (SAR ADC) is presented. In this CDAC, a number of pre-charged capacitors are placed in different series configurations to produce a desired voltage level. Therefore, given an input code, a series configuration of the capacitors is created to produce a voltage. Current is drawn from the supply voltage only in one step of the ADC conversion to reduce the power consumption. Therefore, the proposed CDAC consumes a fixed and small amount of power regardless of the input code. The output common mode voltage (Vcm) of the DAC remains fixed for all the digital codes....