Sharif Digital Repository

A novel, precision current reference with low temperature and supply sensitivity and without any external component has been designed in a 0.18μm CMOS mixed-mode process. The circuit is based on a bandgap reference (BGR) voltage and a CMOS circuit like a beta multiplier. The simulation results show max-to-min fluctuation of about 1% over a temperature range of -20°C to +100°C and supply voltage range of 1.1V to 2V with ±30% tolerance for all of the used on-chip resistors. The maximum nominal current variation in process corners is less than 3.5%. © 2003 IEEE  

A compact, low power, clock frequency doubler circuit with no external devices designed and manufactured in a 0.5um CMOS technology. Proposed circuit generates a 4.096MHz output clock frequency from a 2.048MHz input clock while an automatic duty cycle control circuit reduces the sensitivity of the duty cycle of output clock to the duty cycle of input signal or process and temperature we variations. For this purpose, an accurate delayed clock is generated. structure besides MOSFET capacitors offers a impact and low power circuit. The area of the circuit is 0.08mm2 while consumes 380uArms SV power supply and drives 15pF capacitor load. Measured output duty cycle shows a variance of 2.7% from... 

Modified two-phase latch and flip-flop are introduced to implement a linear phase-detector (LPD) for 1/N-rate clock recovery applications. This technique greatly simplifies the required circuitry of the LPD and makes it suitable for higher speed applications while consuming less power compared to the conventional techniques  

An analytic method for prediction of oscillation amplitude and supply current of differential CMOS oscillators is presented. The validity of this method has been verified by designing an LC CMOS oscillator in a 0.24 μm CMOS technology. The predictions are in good agreement with simulation results over a wide range of supply voltage