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electric-power-utilization
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A new CPA resistant software implementation for symmetric ciphers with smoothed power consumption
, Article 13th International ISC Conference on Information Security and Cryptology, 7 September 2016 through 8 September 2016 ; 2016 , Pages 38-45 ; 9781509039494 (ISBN) ; Salmasizadeh, M ; Sharif University of Technology
Institute of Electrical and Electronics Engineers Inc
Abstract
In this paper we propose a new method for applying hiding countermeasure against CPA attacks. This method is for software implementation, based on smoothing power consumption of the device. We propose a new heuristic encoding scheme for implementing block cipher algorithms. Our new method includes only AND-equivalent and XOR-equivalent operations since every cryptographic algorithm can be implemented with two basic operations, namely AND, XOR. In order to practically evaluate resistance improvement against CPA, we implement the proposed coding scheme on SIMON, a lightweight block cipher, on a smartcard with ATmega163 microprocessor. The results of this implementation show a 350 times more...
Prediction of Iran's annual electricity demand: Artificial intelligence approaches
, Article 11th International Conference on Innovations in Information Technology, 1 November 2015 through 3 November 2015 ; 2015 , Pages 373-377 ; 9781467385114 (ISBN) ; Jalili, M ; Davari, H ; Maknoon, R ; Ismail L ; GE Software; IBM; UAE University (UAEU) ; Sharif University of Technolgoy
Institute of Electrical and Electronics Engineers Inc
Abstract
Accurate prediction of electricity demand is essential for planning, policy making and resource allocation in national level. In this manuscript, we applied a number of artificial intelligence methods to predict macro-scale electricity consumption rates in Iran. To this end, three socio-economic and three environmental factors were considered as inputs to the prediction models. We used data for the period 1967-2013 in order to predict the power demand in the years 2014-2018. Experimental results showed that the path coefficient analysis model with linear coefficients had the best performance among the models considered in this study. The outcome of this research can help the policy makers to...
On designing an efficient numerical-based forbidden pattern free crosstalk avoidance codec for reliable data transfer of NoCs
, Article Microelectronics Reliability ; Volume 63 , 2016 , Pages 304-313 ; 00262714 (ISSN) ; Miremadi, S. G ; Sharif University of Technology
Elsevier Ltd
Abstract
Inter-wire coupling capacitances can lead to crosstalk fault that is strongly dependent on the transition patterns appearing on the wires. These transition patterns can cause mutual influences between adjacent wires of NoCs and as a result threaten the reliability of data transfer seriously. To increase the reliability of NoCs against the crosstalk fault, Forbidden Pattern Free (FPFs) codes are used. To generate FPF codes, numerical systems are among the overhead-efficient mechanisms. The algorithms of numerical systems have direct effect on the amounts of the codec overheads including power consumption, area occupation and performance of NoCs. To find an overhead-efficient numerical system,...
Captopril: Reducing the pressure of bit flips on hot locations in non-volatile main memories
, Article Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016, 14 March 2016 through 18 March 2016 ; 2016 , Pages 1116-1119 ; 9783981537062 (ISBN) ; Sarbazi Azad, H ; Sharif University of Technology
Institute of Electrical and Electronics Engineers Inc
2016
Abstract
High static power consumption and insufficient scalability of the commonly used DRAM main memory technology appear to be tough challenges in upcoming years. Hence, adopting new technologies, i.e. non-volatile memories (NVMs), is a proper choice. NVMs tolerate a low number of write operations while having good scalability and low static power consumption. Due to the non-destructive nature of a read operation and the long latency of a write operation in NVMs, designers use read-before-write (RBW) mechanism to mask the unchanged bits during write operation in order to reduce bit flips. Based on this observation that some specific locations of blocks are responsible for the majority of bit...
Excess power elimination in high-resolution dynamic comparators
, Article Microelectronics Journal ; Volume 64 , 2017 , Pages 45-52 ; 00262692 (ISSN) ; Sharifkhani, M ; Sharif University of Technology
Elsevier Ltd
2017
Abstract
In this paper, a method is presented to reduce the power consumption of the two-stage dynamic comparators. In the two-stage dynamic comparators, the first stage (pre-amplifier stage) amplifies the input differential voltage. Then the second stage (latch stage) is activated and finishes the comparison. When the comparison is about to finish, the balance of the positive feedback of the latch stage tends to tilt toward one of the outputs; after this, to the end of the comparison, there is no need for additional pre-amplification gain which causes excess power consumption. In this paper, a method is proposed to eliminate this part of power consumption. It is shown that while reducing the power...
A power gating switch box architecture in routing network of SRAM-based FPGAs in dark silicon era
, Article 20th Design, Automation and Test in Europe, DATE 2017, 27 March 2017 through 31 March 2017 ; 2017 , Pages 1342-1347 ; 9783981537093 (ISBN) ; Khaleghi, B ; Asadi, H ; ACM Special Interest Group on Design Automation (ACM SIGDA); Electronic System Design Alliance (ESDA); et al.; European Design and Automation Association (EDAA); European Electronic Chips and Systems Design Initiative (ECSI); IEEE Council on Electronic Design Automation (CEDA) ; Sharif University of Technology
Institute of Electrical and Electronics Engineers Inc
2017
Abstract
Continuous down scaling of CMOS technology in recent years has resulted in exponential increase in static power consumption which acts as a power wall for further transistor integration. One promising approach to throttle the substantial static power of Field-Programmable Gate Array (FPGAs) is to power off unused routing resources such as switch boxes, known as dark silicon. In this paper, we present a Power gating Switch Box Architecture (PESA) for routing network of SRAM-based FPGAs to overcome the obstacle for further device integration. In the proposed architecture, by exploring various patterns of used multiplexers in switch boxes, we employ a configurable controller to turn off unused...
A low-power high-speed comparator for precise applications
, Article IEEE Transactions on Very Large Scale Integration (VLSI) Systems ; Volume 26, Issue 10 , 2018 , Pages 2038-2049 ; 10638210 (ISSN) ; Sharifkhani, M ; Sharif University of Technology
Institute of Electrical and Electronics Engineers Inc
2018
Abstract
A low-power comparator is presented. pMOS transistors are used at the input of the preamplifier of the comparator as well as the latch stage. Both stages are controlled by a special local clock generator. At the evaluation phase, the latch is activated with a delay to achieve enough preamplification gain and avoid excess power consumption. Meanwhile, small cross-coupled transistors increase the preamplifier gain and decrease the input common mode of the latch to strongly turn on the pMOS transistors (at the latch input) and reduce the delay. Unlike the conventional comparator, the proposed structure let us set the optimum delay for preamplification and avoid excess power consumption. The...
Express read in MLC phase change memories
, Article ACM Transactions on Design Automation of Electronic Systems ; Volume 23, Issue 3 , February , 2018 ; 10844309 (ISSN) ; Sarbazi Azad, H ; Sharif University of Technology
Association for Computing Machinery
2018
Abstract
In the era of big data, the capability of computer systems must be enhanced to support 2.5 quintillion byte/day data delivery. Among the components of a computer system, main memory has a great impact on overall system performance. DRAM technology has been used over the past four decades to build main memories. However, the scalability of DRAM technology has faced serious challenges. To keep pace with the ever-increasing demand for larger main memory, some new alternative technologies have been introduced. Phase change memory (PCM) is considered as one of such technologies for substituting DRAM. PCM offers some noteworthy properties such as low static power consumption, nonvolatility, and...
A new adaptive prediction-based tracking scheme for wireless sensor networks
, Article Proceedings of the 7th Annual Communication Networks and Services Research Conference, CNSR 2009, 11 May 2009 through 13 May 2009, Moncton, NB ; 2009 , Pages 335-341 ; 9780769536491 (ISBN) ; Abolhassani, B ; Abdizadeh, M. T ; Sharif University of Technology
2009
Abstract
The accuracy of the object tracking is dependent on the tracking time interval. Smaller tracking time interval increases the accuracy of tracking a moving object. However, this increases the power consumption significantly. This paper proposes a new adaptive algorithm (AEC) to adapt tracking time interval such that it minimizes power consumption while keeping the required accuracy. Simulation results show that using the proposed algorithm, the tracking network has a good performance with the added advantage of reducing the power consumption significantly when compared with existing nonadaptive methods (like PATES). Moreover, simulation results show that the performance of the proposed...
Privacy of real-time pricing in smart grid
, Article 58th IEEE Conference on Decision and Control, CDC 2019, 11 December 2019 through 13 December 2019 ; Volume 2019-December , 2019 , Pages 5162-5167 ; 07431546 (ISSN); 9781728113982 (ISBN) ; Fay, D ; Dimitrakakis, C ; Kamgarpour, M ; Sharif University of Technology
Institute of Electrical and Electronics Engineers Inc
2019
Abstract
Installing smart meters to publish real-time electricity rates has been controversial while it might lead to privacy concerns. Dispatched rates include fine-grained data on aggregate electricity consumption in a zone and could potentially be used to infer a household's pattern of energy use or its occupancy. In this paper, we propose Blowfish privacy to protect the occupancy state of the houses connected to a smart grid. First, we introduce a Markov model of the relationship between electricity rate and electricity consumption. Next, we develop an algorithm that perturbs electricity rates before publishing them to ensure users' privacy. Last, the proposed algorithm is tested on data inspired...
OMUX: Optical multicast and unicast-capable interconnection network for data centers
, Article Optical Switching and Networking ; Volume 33 , 2019 , Pages 1-12 ; 15734277 (ISSN) ; Koohi, S ; Sharif University of Technology
Elsevier B.V
2019
Abstract
Exponential growth of traffic and bandwidth demands in current data center networks requires low-latency high-throughput interconnection networks, considering power consumption. By considering growth of both multicast and unicast applications, power efficient communication becomes one of the main design challenges in today's data center networks. Addressing these demands, optical networks suggest several benefits as well as circumventing most disadvantages of electrical networks. In this paper, we propose an all-optical scalable architecture, named as OMUX, for communicating intra-data centers. This architecture utilizes passive optical devices and enables optical circuit switching without...
Focus on What is Needed: Area and Power Efficient FPGAs Using Turn-Restricted Switch Boxes
, Article 18th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019, 15 July 2019 through 17 July 2019 ; Volume 2019-July , 2019 , Pages 615-620 ; 21593469 (ISSN) ; 9781538670996 (ISBN) ; Sadrosadati, M ; Pointner, S ; Wille, R ; Sarbazi Azad, H ; Technical Committee on VLSI (TCVLSI) of IEEE Computer Society (CS) ; Sharif University of Technology
IEEE Computer Society
2019
Abstract
Field-Programmable Gate Arrays (FPGAs) employ a significant amount of SRAM cells in order to provide a flexible routing architecture. While this flexibility allows for a rather easy realization of arbitrary functionality, the respectively required cells significantly increase the area and power consumption of the FPGA. At the same time, it can be observed that full routing flexibility is frequently not needed in order to efficiently realize the desired functionality. In this work, we are proposing an FPGA realization which focuses on what is needed and realizes only a subset of the possible routing options using what we call Turn-Restricted Switch-Boxes. While this may yield a slight...
An innovative solar assisted desiccant-based evaporative cooling system for co-production of water and cooling in hot and humid climates
, Article Energy Conversion and Management ; Volume 185 , 2019 , Pages 396-409 ; 01968904 (ISSN) ; Roshandel, R ; Vakiloroaya, V ; Sharif University of Technology
Elsevier Ltd
2019
Abstract
Although evaporative coolers consume much lower electricity than the vapor compression systems, they are not applicable in humid climates. Combination of desiccant wheels and evaporative coolers, known as desiccant-based evaporative cooling systems, allows evaporative coolers to be used in humid climates, which provide significant energy and environmental advantages with respect to vapor compression systems. However, one of the main disadvantages of evaporative cooling is the high water. Regarding the global water crisis, a cooling system which saves both water and energy will be an attractive alternative to the current cooling systems. To this aim, this paper presents a novel...
Flexibility scheduling for large customers
, Article IEEE Transactions on Smart Grid ; Volume 10, Issue 1 , 2019 , Pages 371-379 ; 19493053 (ISSN) ; Parvania, M ; Fotuhi Firuzabad, M ; Rajabi Ghahnavieh, A ; Sharif University of Technology
Institute of Electrical and Electronics Engineers Inc
2019
Abstract
Large customers are considered as major flexible electricity demands which can reduce their electricity costs by choosing appropriate strategies to participate in demand response programs. However, practical methods to aid the large customers for handling the complex decision making process for participating in the programs have remained scarce. This paper proposes a novel decision-making tool for enabling large customers to determine how they adjust their electricity usage from normal consumption patterns in expectation of gaining profit in response to changes in prices and incentive payments offered by the system operators. The proposed model, formulated as a mixed-integer linear...
Pedal: Power-delay product objective function for internet of things applications
, Article 34th Annual ACM Symposium on Applied Computing, SAC 2019, 8 April 2019 through 12 April 2019 ; Volume Part F147772 , 2019 , Pages 892-895 ; 9781450359337 (ISBN) ; Mohammad Salehi, A. A ; Shirbeigi, M ; Hosseini Monazzah, A. M ; Ejlali, A ; ACM Special Interested Group on Applied Computing ; Sharif University of Technology
Association for Computing Machinery
2019
Abstract
The increasing trend in the number of smart connected devices has turned the routing procedure as one of the major challenges in IoT infrastructures. The Routing Protocol for Low Power and Lossy Networks (RPL) was introduced to satisfy different IoT application requirements through Objective Functions (OF). Although there have been several studies on introducing new OFs in order to fulfill specific IoT characteristics, e.g., energy and delay efficiency, reliability, and stability, but still there is a lack of novel OFs which fulfill the IoT application requirements in terms of both, the performance and the power consumption simultaneously. In this paper, we have proposed PEDAL, an OF which...
Flexibility scheduling for large customers
, Article IEEE Transactions on Smart Grid ; Volume 10, Issue 1 , 2019 , Pages 371-379 ; 19493053 (ISSN) ; Parvania, M ; Fotuhi Firuzabad, M ; Rajabi Ghahnavieh, A ; Sharif University of Technology
Institute of Electrical and Electronics Engineers Inc
2019
Abstract
Large customers are considered as major flexible electricity demands which can reduce their electricity costs by choosing appropriate strategies to participate in demand response programs. However, practical methods to aid the large customers for handling the complex decision making process for participating in the programs have remained scarce. This paper proposes a novel decision-making tool for enabling large customers to determine how they adjust their electricity usage from normal consumption patterns in expectation of gaining profit in response to changes in prices and incentive payments offered by the system operators. The proposed model, formulated as a mixed-integer linear...
Pedal: Power-delay product objective function for internet of things applications
, Article 34th Annual ACM Symposium on Applied Computing, SAC 2019, 8 April 2019 through 12 April 2019 ; Volume Part F147772 , 2019 , Pages 892-895 ; 9781450359337 (ISBN) ; Mohammad Salehi, A. A ; Shirbeigi, M ; Hosseini Monazzah, A. M ; Ejlali, A ; ACM Special Interested Group on Applied Computing ; Sharif University of Technology
Association for Computing Machinery
2019
Abstract
The increasing trend in the number of smart connected devices has turned the routing procedure as one of the major challenges in IoT infrastructures. The Routing Protocol for Low Power and Lossy Networks (RPL) was introduced to satisfy different IoT application requirements through Objective Functions (OF). Although there have been several studies on introducing new OFs in order to fulfill specific IoT characteristics, e.g., energy and delay efficiency, reliability, and stability, but still there is a lack of novel OFs which fulfill the IoT application requirements in terms of both, the performance and the power consumption simultaneously. In this paper, we have proposed PEDAL, an OF which...
Simultaneous management of peak-power and reliability in heterogeneous multicore embedded systems
, Article IEEE Transactions on Parallel and Distributed Systems ; Volume 31, Issue 3 , 2020 , Pages 623-633 ; Saber Latibari, J ; Pasandideh, M ; Ejlali, A ; Sharif University of Technology
IEEE Computer Society
2020
Abstract
Analysis of reliability, power, and performance at hardware and software levels due to heterogeneity is a crucial requirement for heterogeneous multicore embedded systems. Escalating power densities have led to thermal issues for heterogeneous multicore embedded systems. This paper proposes a peak-power-aware reliability management scheme to meet power constraints through distributing power density on the whole chip such that reliability targets are satisfied. In this paper, we consider peak power consumption as a system-level power constraint to prevent system failure. To balance the power consumption, we also employ a Dynamic Frequency Scaling (DFS) method to further reduce peak power...
An adaptive approach to manage the number of virtual channels
, Article 22nd International Conference on Advanced Information Networking and Applications Workshops/Symposia, AINA 2008, Gino-wan, Okinawa, 25 March 2008 through 28 March 2008 ; 2008 , Pages 353-358 ; 1550445X (ISSN) ; 0769530966 (ISBN); 9780769530963 (ISBN) ; Koohi, S ; Hessabi, S ; Rahmati, D ; Sharif University of Technology
2008
Abstract
Network-on-Chip (NoC) is a precious approach to handle huge number of transistors by virtue of technology scaling to lower than 50nm. Virtual channels have been introduced in order to improve the performance according to a timing multiplexing concept in each physical channel. The incremental effect of virtual channels on power consumption has been shown in literatures. The issue of power saving has always been controversial to many designers. In this paper, we introduce a new technique which tries to adaptively mange the number of virtual channels in order to reduce the power consumption while not degrading the performance of the network without any reconfiguration. Our experimental results...
Reimbursing the handshake overhead of asynchronous circuits using compiler pre-synthesis optimizations
, Article 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, DSD 2008, Parma, 3 September 2008 through 5 September 2008 ; 2008 , Pages 290-297 ; 9780769532776 (ISBN) ; Mirza Aghatabar, M ; Najibi, M ; Pedram, H ; Sadeghi, A ; Sharif University of Technology
2008
Abstract
Asynchronous circuits have many advantages vs synchronous design styles like high performance and lower power consumption; however, there is a drawback of big overhead in handshake circuitry of these circuits. In this paper, we have reduced the amount of these extra circuits by take advantage of some compiler techniques. The compiler methods can be used innovatively to improve the synthesis results in terms of both power consumption and area, since these code motions lead to removing of completion detection and validity check parts of asynchronous designs. To the best of our knowledge this is the first effort in using the compiler pre-synthesis optimizations in asynchronous circuits to...