Loading...
Search for:
semiconductor-devices
0.009 seconds
Total 23 records
An optimal analytical solution for maximizing expected battery lifetime using the calculus of variations
, Article Integration ; Volume 71 , March , 2020 , Pages 86-94 ; Ejlali, A ; Sharif University of Technology
Elsevier B.V
2020
Abstract
The exponential growth in the semiconductor industry and hence the increase in chip complexity, has led to more power usage and power density in modern processors. On the other hand, most of today's embedded systems are battery-powered, so the power consumption is one of the most critical criteria in these systems. Dynamic Voltage and Frequency Scaling (DVFS) is known as one of the most effective energy-saving methods. In this paper, we propose the optimal DVFS profile to minimize the energy consumption of a battery-based system with uncertain task execution time under deadline constraints using the Calculus of Variations (CoV). The contribution of this work is to analytically calculate the...
Seedless growth of two-dimensional disc-shaped WS2 layers by chemical vapor deposition
, Article Materials Chemistry and Physics ; Volume 257 , 2021 ; 02540584 (ISSN) ; Ghanbari, H ; Simchi, A ; Maghsoumi, A ; Sharif University of Technology
Elsevier Ltd
2021
Abstract
Chemical processing of two-dimensional (2D) transition metal dichalcogenides has attracted immense attention due to their unique optical, electrical, and catalytic properties. In this paper, we show that under special conditions during seedless chemical vapor deposition (CVD), it is possible to grow large-area 2D WS2 layers with disc-shaped morphology, which has been scarcely reported. Detailed characterizations of the CVD-grown layers by Raman spectroscopy, atomic force microscopy, transmission electron microscopy, and X-ray photoelectron spectroscopy have revealed that a gradient in the precursor concentration in the gas phase and strain energy in the deposited hexagonal clusters favor...
Evolution of quantum electronic features with the size of silicon nanoparticles embedded in a sio2 layer obtained by low energy ion implantation
, Article 11th International Autumn Meeting on Gettering and Defect Engineering in Semiconductor Technology, GADEST 2005, 25 September 2005 through 30 September 2005 ; Volume 108-109 , 2005 , Pages 71-76 ; 10120394 (ISSN); 9783908451136 (ISBN) ; Shalchian, M ; Benassayag, G ; Coffin, H ; Bonafos, C ; Dumas, C ; Atarodi, S. M ; Claverie, A ; Pichaud B ; Claverie A ; Alquier D ; Richter H ; Kittler M ; Richter H ; Kittler M ; Sharif University of Technology
Trans Tech Publications Ltd
2005
Abstract
In this paper, we have studied the evolution of quantum electronic features with the size of silicon nanoparticles embedded in an ultra-thin SiO2 layer. These nanoparticles were synthesized by ultralow energy (1 KeV) ion implantation and annealing. Their size was modified using the effect of annealing under slightly oxidizing ambient (N2+O2). Material characterization techniques including transmission electron microscopy (TEM) Fresnel imaging and spatially resolved electron energy loss spectroscopy (EELS) have been used to evaluate the effects of oxidation on structural characteristics of nanocrystal layer. Electrical transport characteristics have been measured on few (less than two...