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Implementing distance line protection schemes among IEC61850-enabled substations
, Article Proceedings of the IEEE Power Engineering Society Transmission and Distribution Conference ; April , 2014 , Page(s): 1 - 5 ; ISSN: 21608555 ; ISBN: 9781479936557 ; Darabi, Z ; Vakilian, M
2014
Abstract
As digital technology has developed, relays have evolved from simple electro-mechanical devices into robust microprocessor-embedded intelligent electronic devices (IEDs). Distance protection, one of the most important and sophisticated forms of substation protection, quickly and selectively detects and clears phase faults in sub-transmission and transmission lines. The installation of a substation automation system (SAS) involves implementing control, monitoring, and protection logic by programming the IEDs and providing an appropriate communication network. IEC61850 has gradually satisfied the need for a standard communication protocol so that IEDs from different manufacturers can...
Modeling of HV Substation Automation Systems and Evaluating of Operation Failure
, M.Sc. Thesis Sharif University of Technology ; Vakilian, Mehdi (Supervisor)
Abstract
In two past decades, a revolution has occurred by emerging of substation automation system in field of substation control and protection system. The traditional control system has changed to the modern automation systems which are based on computer networks. The development of this project become possible by having experience in and being familiar with automation systems, studying equipment specifications, tasks, and criteria and analyzing operation of various systems. The main target of this thesis is evaluating the automation system precisely and exhaustively and developing a model based on mathematical relations. This model is founded based on the application and analysis of the networks....
Architecture of Reconfigurable Optical Network-on-Chip
, M.Sc. Thesis Sharif University of Technology ; Hesabi, Shahin (Supervisor)
Abstract
According to power limitation on a chip and the need to simultaneously access high utilization and low power consumption, Multi-Processor System-on-Chip (MPSoC) architectures have been introduced. The major part of power consumption in a network on chip belongs to interconnects. One of the most important issues is to decrease power consumption while maintaining high utilization. The ability of optical interconnects in decreasing power consumption and increasing utilization has introduced a new architecture called optical network on chip. This architecture uses the benefits of optical signals and elements in order to transfer data. In this thesis, we introduce a new architecture with...
Synthesis of C60 and Endohedral Fullerenes in New Multi-Channel Arc Reactor Equipped with Horizontal Graphite Electrodes
, M.Sc. Thesis Sharif University of Technology ; Ghanbari, Bahram (Supervisor)
Abstract
One of the most common methods of producing fullerenes is electric arc vaporization of graphite. Due to the low yield and purity of the nanoparticles in this method, the synthesis and isolation of the area research is important. In this work, the production was improved in a multi-channel arc reactor in which having horizontal graphite electrodes. The influence of various operational parameters such as pressure of inert gas, spark time, interval time between two sparks, voltage and current were completely optimized. Moreover, the prominent advantage of the new reactor was increasing the number of manufacturing units, at least from one to three, which the production of fullerene was...
Application-based dynamic reconfiguration in optical network-on-chip
, Article Computers and Electrical Engineering ; Volume 45 , July , 2015 , Pages 417-429 ; 00457906 (ISSN) ; Koohi, S ; Hessabi, S ; Sharif University of Technology
Elsevier Ltd
2015
Abstract
We propose a new optical reconfigurable Network-on-Chip (NoC), named ReFaT ONoC (Reconfigurable Flat and Tree Optical NoC). ReFaT is a dynamically reconfigurable architecture, which customizes the topology and routing paths based on the application characteristics. ReFaT, as an all-optical NoC, routes optical packets based on their wavelengths. For this purpose, we propose a novel architecture for the optical switch, which eliminates the need for optical resource reservation, and thus avoids the corresponding latency and area overheads. As a key idea for dynamic reconfiguration, each application is mapped to a specific set of wavelengths and utilizes its dedicated routing algorithm. We...
Online data loss in substation automation systems
, Article IEEE Power and Energy Society General Meeting, 26 July 2015 through 30 July 2015 ; Volume 2015-September , 2015 ; 19449925 (ISSN) ; 9781467380409 (ISBN) ; Vakilian, M ; Fu, Y ; Sharif University of Technology
IEEE Computer Society
2015
Abstract
The study presented in this paper investigated online data loss in a substation automation system (SAS) under network faults or failures. Online data loss refers to the amount of data that become inaccessible when a failure occurs in the SAS. It is a mathematical index related to the network's topology and architecture, and the calculation of which requires knowledge of the physical characteristics of SAS elements. The elements that record data were identified, and then the online data lost due to failures in those elements were determined. Also, as a case study, a typical SAS was examined under various states of failure, and the online data loss occurring under each scenarios was calculated...
Latency considerations in IEC 61850-enabled substation automation systems
, Article IEEE Power and Energy Society General Meeting, 24 July 2011 through 28 July 2011, Detroit, MI ; 2011 ; 19449925 (ISSN) ; 9781457710018 (ISBN) ; Mousavi, M. J ; Vakilian, M ; Sharif University of Technology
2011
Abstract
Substation Automation Systems (SAS) offer powerful, fast, and viable ways to design, automate, and implement substation protection, control, and monitoring functions in modern transmission and distribution grids. Today's SAS -more than ever- rely on the adoption of IEC61850 as a worldwide standard for interoperability and dependable peer-to-peer and substation communications. Being based on the Ethernet computer networking technology, the reliability issues associated with latency in 61850-enabled SAS is of a design consideration. Unpredictability is the most important challenge for latency assessment. This paper discusses the background framework for latency evaluations in SAS by...
A modified control strategy for parallel hybrid electric vehicles equipped with continuously variable transmission
, Article Scientia Iranica ; Volume 23, Issue 3 , 2016 , Pages 966-975 ; 10263098 (ISSN) ; Foumani, M. S ; Falahati, F ; Sharif University of Technology
Sharif University of Technology
2016
Abstract
This paper aims to establish a control strategy for parallel hybrid electric vehicles equipped with full-toroidal Continuously Variable Transmission (CVT). First, the advantages of CVT are elucidated. Afterwards, a modified control strategy on the base of Baseline static Control Strategy (BCS) is proposed. Employing this strategy, in some moments, the engine operates in its fuel-optimal point to decrease the vehicle Fuel Consumption (FC). It is demonstrated that the modifications in BCS are applicable using a CVT as the power train. In order to investigate the implemented modification, an optimization on the proposed control strategy and BCS in SC03 driving cycle is accomplished and then,...
Power-efficient prefetching on GPGPUs
, Article Journal of Supercomputing ; Volume 71, Issue 8 , August , 2015 , pp. 2808-2829 ; ISSN: 09208542 ; Hessabi, S ; Abdi, M ; Baniasadi, A ; Sharif University of Technology
2015
Abstract
The graphics processing unit (GPU) is the most promising candidate platform for achieving faster improvements in peak processing speed, low latency and high performance. The highly programmable and multithreaded nature of GPUs makes them a remarkable candidate for general purpose computing. However, supporting non-graphics computing on graphics processors requires addressing several architectural challenges. In this paper, we focus on improving performance by better hiding long waiting time for transferring data from the slow global memory. Furthermore, we show that the proposed method can reduce power and energy. Reduction in access time to off-chip data has a noticeable role in reducing...
Quantitative modeling and analysis of substation automation systems
, Article Proceedings of the IEEE Power Engineering Society Transmission and Distribution Conference ; 2012 ; 21608555 (ISSN) ; 9781467319348 (ISBN) ; Darabi, Z ; Fu, Y ; Vakilian, M ; Sharif University of Technology
2012
Abstract
The application of digital technologies in power systems has resulted in an evolutionary replacement of electromechanical devices with numerical ones featuring internal digital processors with communication capabilities. A substation automation system (SAS) deploys substation operation functions, including control, protection, monitoring, and measuring. Ethernet technology and local area networks (LANs) make it possible to design substation communication architectures with greater reliability, availability, speed, and cost savings than conventional hard-wired systems. This paper proposes a new method to describe topologies of the SAS as an interconnected network. The concept of data...
Experimental Analysis of Tiba Gearbox and Provide a Solution to Reduce NVH
, M.Sc. Thesis Sharif University of Technology ; Saadat Foumani, Mahmud (Supervisor)
Abstract
For over a hundred years, vehicles have entered the human environment and influenced it. One of the most important effects that vehicles have on their surroundings and humans is their acoustic noise. The gearbox is one of the important components of the vehicle's transmission chain, in which the gears interact with each other and cause to create noise and vibration. These vibrations are transmitted through the bearings to the gearbox casing and then transferred to other parts of the vehicle via gearbox supports. Many researchers have studied the factors of NVH production in gearboxes and used methods such as gear profile modification and optimization of shaft and casing to reduce NVH. This...
A new distinguish attack against ABC stream cipher
, Article 9th International Conference on Advanced Communication Technology, ICACT 2007, Gangwon-Do, 12 February 2007 through 14 February 2007 ; Volume 3 , 2007 , Pages 1768-1770 ; 17389445 (ISSN) ; Bagheri, N ; Naderi, M ; Mohajeri, J ; Sharif University of Technology
2007
Abstract
ABC is a synchronous stream cipher proposed by Anashin, Bogdanov, Kizhvatov and Kumar as a candidate for ECRYPT Project (call for Stream Cipher). ABC cipher consists of three component named A, B, and C and gets a key and an Initial Vector (IV) each of 128-bit length. In this paper we propose a new distinguish attack to finding the internal state of component B and C of ABC algorithm in time complexity of 288. This attack is completely retrieves internal state of those components by analyzing the 232 32-bits word sequences of C component output of this cipher
Modeling of Gas Hydrate Formation in Presence of Inhibitors Using the Fuzzy Logic
, M.Sc. Thesis Sharif University of Technology ; Taghikhani, Vahid (Supervisor) ; Ghotbi, Cyrus (Supervisor)
Abstract
Nowadays oil and gas industry has taken the pulse of world energy. Different countries of the world are trying more and more to explore and produce this black gold. To do so these countries has gained many experiences and even gone to seas and oceans to find oil and gas. In the process, they has faced with a new phenomenon called gas hydrate. The phenomenon which was unknown and destructive at first after excessive research, today is even called as the future energy source of the world. But what we discussed in this study is hydrate as a problem in oil and gas industry. Gas hydrates are formed in favorable temperature and pressure condition (low temperature and high pressure) in the...
Energy Reduction in GPGPUs
, Ph.D. Dissertation Sharif University of Technology ; Hessabi, Shahin (Supervisor) ; Baniasadi, Amirali (Co-Advisor)
Abstract
The number of transistors on a single chip is growing exponentially which results in a huge increase in consumed power and temperature. Parallel processing is a solution which concentrates on increasing the number of cores instead of improving single thread performance. Graphics Processing Units (GPUs) are parallel accelerators which are categorized as manycore systems. However, recent research shows that their consumed power and energy are increasing. In this research, we aim to propose methods to make GPGPUs energy effiecient. In this regard, we evaluated the detailed consummed power of GPGPUs. Our results show that memory sub-system is a critical bottelneck in terms of performance and...
Investigation of Application of Nano-Photocatalytic Degradation for Industrial Wastewater Treatmen
, M.Sc. Thesis Sharif University of Technology ; Roosta Azad, Reza (Supervisor) ; Vossoughi, Manouchehr (Supervisor)
Abstract
The main objective of this project is the deposition of photo-catalysts on cement and concrete blocks with an emphasis on commercialization. We started with an extensive study of common methods introduced in previous literature, and conclude with a number of suggestions for industrialization. First, slurry and sol-gel deposition of the photo-catalysts on blocks of type 2 commercial cement which is one of the most used materials in construction of buildings and waste-water treatment plants has been examined to reach a method of sample formation. Due to the simplicity of common methods and low quality of formed samples (less than 5 percent aging efficiency), the obtained experience was used to...
FiRot: An efficient crosstalk mitigation method for Network-on-Chips
, Article Proceedings - 16th IEEE Pacific Rim International Symposium on Dependable Computing, PRDC 2010, 13 December 2010 through 15 December 2010 ; December , 2010 , Pages 55-61 ; 9780769542898 (ISBN) ; Shafaei, M ; Miremadi, S. G ; Falahati, H ; Taheri, S ; Sharif University of Technology
2010
Abstract
This paper proposes an efficient crosstalk mitigation method for Network-on-Chips (NoCs). The proposed method investigates flits in each packet to minimize the number of harmful transition patterns appearing on the communication channels of NoC. To do this, the content of every flit is rotated with respect to the previously flit sent through the channel. Rotation is done to find a rotated version of the flit which minimizes the number of harmful transition patterns. A tag field is added into the rotated flit to enable the receiving side to recover the original flit. Maximum number of rotations is bounded by a fixed value to minimize the timing and power overheads of the proposed method....
Neda: supporting direct inter-core neighbor data exchange in GPUs
, Article IEEE Computer Architecture Letters ; Volume 17, Issue 2 , 2018 , Pages 225-229 ; 15566056 (ISSN) ; Sadrosadati, M ; Falahati, H ; Barkhordar, M ; Sarbazi Azad, H ; Sharif University of Technology
Institute of Electrical and Electronics Engineers Inc
2018
Abstract
Image processing applications employ various filters for several purposes, such as enhancing the images and extracting the features. Recent studies show that filters in image processing applications take a substantial amount of the execution time, and it is crucial to boost their performance to improve the overall performance of the image processing applications. Image processing filters require a significant amount of data sharing among threads which are in charge of filtering neighbor pixels. Graphics Processing Units (GPUs) attempt to satisfy the demand of data sharing by providing the scratch-pad memory, shuffle instructions, and on-chip caches. However, we observe that these mechanisms...
ISP: Using idle SMs in hardware-based prefetching
, Article Proceedings - 17th CSI International Symposium on Computer Architecture and Digital Systems, CADS 2013 ; October , 2013 , Pages 3-8 ; 9781479905621 (ISBN) ; Abdi, M ; Baniasadi, A ; Hessabi, S ; Computer Society of Iran; IPM ; Sharif University of Technology
IEEE Computer Society
2013
Abstract
The Graphics Processing Unit (GPU) is the most promising candidate platform for faster rate of improvement in peak processing speed, low latency and high performance. The highly programmable and multithreaded nature of GPUs makes them a remarkable candidate for general purpose computing. However, supporting non-graphics computing on graphics processors requires addressing several architecture challenges. In this paper, we focus on improving performance by better hiding long waiting time to transfer data from the slow global memory. Thereupon study an effective light-overhead prefetching mechanism, which utilizes idle processing elements. Our results show that we can potentially improve...
Efficient nearest-neighbor data sharing in GPUs
, Article ACM Transactions on Architecture and Code Optimization ; Volume 18, Issue 1 , 2021 ; 15443566 (ISSN) ; Sadrosadati, M ; Falahati, H ; Barkhordar, M ; Drumond, M. P ; Sarbazi Azad, H ; Falsafi, B ; Sharif University of Technology
Association for Computing Machinery
2021
Abstract
Stencil codes (a.k.a. nearest-neighbor computations) are widely used in image processing, machine learning, and scientific applications. Stencil codes incur nearest-neighbor data exchange because the value of each point in the structured grid is calculated as a function of its value and the values of a subset of its nearest-neighbor points. When running on Graphics Processing Unit (GPUs), stencil codes exhibit a high degree of data sharing between nearest-neighbor threads. Sharing is typically implemented through shared memories, shuffle instructions, and on-chip caches and often incurs performance overheads due to the redundancy in memory accesses. In this article, we propose Neighbor Data...
Data-Aware compression of neural networks
, Article IEEE Computer Architecture Letters ; Volume 20, Issue 2 , 2021 , Pages 94-97 ; 15566056 (ISSN) ; Peyro, M ; Amini, H ; Taghian, M ; Sadrosadati, M ; Lotfi Kamran, P ; Sarbazi Azad, H ; Sharif University of Technology
Institute of Electrical and Electronics Engineers Inc
2021
Abstract
Deep Neural networks (DNNs) are getting deeper and larger which intensify the data movement and compute demands. Prior work focuses on reducing data movements and computation through exploiting sparsity and similarity. However, none of them exploit input similarity and only focus on sparsity and weight similarity. Synergistically analysing the similarity and sparsity of inputs and weights, we show that memory accesses and computations can be reduced by 5.7× and 4.1×, more than what can be decreased by exploiting only sparsity, and 3.9× and 2.1×, more than what can be decreased by exploiting only weight similarity. We propose a new data-aware compression approach, called DANA, to effectively...