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hosseini-monazzah--amir-mahdi
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An Energy-aware Objective Function for Energy-harvesting IOT Infrastructures
, M.Sc. Thesis Sharif University of Technology ; Ejlali, Alireza (Supervisor) ; Hosseini Monazzah, Amir Mahdi (Supervisor)
Abstract
Internet of things (IOT) interconnects a system of low power embedded devices that each of them has a unique identifier, without human intervention. The number of devices of IOT increases every day, therefor routing in the network of IOT is an important challenge. So, Internet Engineering Task Force (IETF) propose a protocol for routing low power and lossy networks in 2012, which is named RPL. Considering the power supply limitation of devices in the network, utilizing energy-aware policies within the RPL is so important. Meanwhile, objective functions have a vital role in the consuming energy. Also, energy consumption determines the lifetime of nodes. Since many of devices are placed in...
Providing Efficient SPM Mapping Algorithms for Fault-Tolerant Embedded Processors
, M.Sc. Thesis Sharif University of Technology ; Miremadi, Ghassem (Supervisor)
Abstract
Deterministic and Predictable behaviors are two important constraints in real-time embedded systems. Using cache memories alongside of CPUs may lead to nondeterministic and unpredictable behaviors in embedded systems. To avoid these behaviors, embedded system designers use Scratchpad Memories (SPMs). In addition, using embedded systems in safty-critical applications need to include reliability and fault tolerance. The first challenge to using SPM is the management of its contents,called SPM Mapping. SPM Mappingconsists of three important parts:1) Determining the most frequent parts of programs, 2) Efficient assignment of SPM area to those parts, and 3) Controlling the transitions of those...
Reliability Improvement in Non-Volatile On-Chip Memories for Embedded Applications
, Ph.D. Dissertation Sharif University of Technology ; Miremadi, Ghassem (Supervisor)
Abstract
With the technology scaling trend in recent years, leakage power has become a major challenge for SRAM-based on-chip memories. According to the recent reports, SRAM-based on-chip memories contribute to more than half of the processors’ power consumption. Accordingly, in recent years, researchers have tried to find an alternative technology for SRAMs in on-chip memories. The International Technology Roadmap for Semiconductors (ITRS) recently announced that STT-MRAMs are the most promising technology to replace SRAMs. While STT-MRAMs benefit from low energy consumption, high endurance, and high density compared to other non-volatile memory technologies, comparing with SRAMs, STT-MRAMs have...
Analysis of Blades Surface Effect on Wind Turbine Performance
, M.Sc. Thesis Sharif University of Technology ; Sadr Hosseini, Hani (Supervisor) ; Sabzehparvar, Mahdi (Supervisor)
Abstract
The development of wind turbine blades model that accurately predict wind turbine thrust in a full range of applicable wind speed has provided a powerful and reliable source for simulation of horizontal axis wind turbine power and thrust force that serves as a valuable tool for wind turbine design and performance analysis. A single-element blade model that reduces the rotor blade characteristics to a lift and drag coefficient vs. angle-of-attack formulation was found to describe accurately the rotor characteristics over a wide operating range. Measurements of wind speed and altitude of wind turbine installation location, rotor speed, and provided thrust is within less than 2% over a wide...
ORIENT: organized interleaved ECCs for new STT-MRAM caches
, Article Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018 ; Volume 2018-January , 19 April , 2018 , Pages 1187-1190 ; 9783981926316 (ISBN) ; Farbeh, H ; Hosseini Monazzah, A. M ; Sharif University of technology
Institute of Electrical and Electronics Engineers Inc
2018
Abstract
Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM) is a promising alternative to SRAM in cache memories. However, STT-MRAMs face with high probability of write errors due to its stochastic switching behavior. To correct the write errors, Error-Correcting Codes (ECCs) used in SRAM caches are conventionally employed. A cache line consists of several codewords and the data bits are selected in such a way that the maximum correction capability is provided based on the error patterns in SRAMs. However, the different write error patterns in STT-MRAM caches leads to inefficiency of conventional ECC configurations. In this paper, first we investigate the efficiency of ECC configurations...
Improving Distributed SVM Learning Algorithm in MapReduce Framework Using Coding
, M.Sc. Thesis Sharif University of Technology ; Jafari, Mahdi (Supervisor)
Abstract
With the rise of the concept of “Big Data”, both data volumes and data processing time increased, imposing the need for new methods of processing and computation of said data.Analytical and computational methods in Machine Learning are some of the most important applications of Big Data processing. There exist many methods of data analysis in the Machine Learning field, each requiring extensive processing on Big Data. One of the methods for working with Big Data is Distributed Systems. MapReduce is one of the most popular methods distributed computation by increasing the ease and speed of distributed processing of big data. But a number of bottlenecks have been discovered in MapReduce which...
Investigating the effect of rolling strain on fracture behavior of roll bonded Al6061 laminates under quasi-static and dynamic loading
, Article Materials Science and Engineering A ; Volume 558 , 2012 , Pages 82-89 ; 09215093 (ISSN) ; Bagheri, R ; Seyed Reihani, S. M ; Sharif University of Technology
2012
Abstract
Damage tolerance improvement has been reported by laminating aluminum alloys and composites by researchers. Three-layer laminates comprising Al6061 outer layers and Al1050 interlayer have been roll bonded in this research. While most of the works done have focused on fracture properties of roll bonded Al laminates in crack arrester geometry, this study explores their behavior in crack divider configuration. Rolling strain is varied to control the interfacial bonding in laminates. The fracture behavior of laminates and the constituent material was examined via three-point bending and impact tests. This study presents significant improvement in damage tolerance of laminates compared to their...
Creep behavior of hot extruded Al-Al2O3 nanocomposite powder
, Article Materials Science and Engineering A ; Volume 527, Issue 10-11 , 2010 , Pages 2567-2571 ; 09215093 (ISSN) ; Simchi, A ; Seyed Reihani, S. M ; Sharif University of Technology
2010
Abstract
A commercial gas-atomized aluminum powder was mechanically milled in a planetary ball mill under an argon atmosphere for 12 h to produce alumina dispersion strengthened aluminum powder. Transmission electron microscopy (TEM) revealed that about 2 vol.% alumina particles with an average size of 100 nm were distributed in the aluminum matrix. The nanocomposite powder was canned in an aluminum container, vacuum de-gassed, and hot extruded at 723 K at an extrusion ratio of 16:1. The creep behavior of the extruded billet in the direction of extrusion was examined at a constant applied load ranging from 10 to 40 MPa at temperatures of 648, 673 and 723 K. A threshold creep-stress was noticed which...
LER: Least-error-rate replacement algorithm for emerging STT-RAM caches
, Article IEEE Transactions on Device and Materials Reliability ; Volume 16, Issue 2 , 2016 , Pages 220-226 ; 15304388 (ISSN) ; Farbeh, H ; Miremadi, S. G ; Sharif University of Technology
Institute of Electrical and Electronics Engineers Inc
2016
Abstract
Spin-transfer-torque RAMs (STT-RAMs) are the most promising technology for replacing Static RAMs (SRAMs) in on-chip caches. One of the major problems in STT-RAMs is the high error rate due to stochastic switching in write operations. Cache replacement algorithms have a major role in the number of write operations into the caches. Due to this fact, it is necessary to redesign cache replacement algorithms to consider the new challenges of STT-RAM caches. This paper proposes a cache replacement algorithm, which is called least error rate (LER) , to reduce the error rate in L2 caches. The main idea is to place the incoming block in a line that incurs the minimum error rate in write operation....
OPTIMAS: overwrite purging through in-execution memory address snooping to improve lifetime of NVM-based scratchpad memories
, Article IEEE Transactions on Device and Materials Reliability ; Volume 17, Issue 3 , 2017 , Pages 481-489 ; 15304388 (ISSN) ; Farbeh, H ; Miremadi, S. G ; Sharif University of Technology
2017
Abstract
SRAM-based scratchpad memories (SPMs) used in embedded systems impose high leakage power. Designing SPMs based on non-volatile memories (NVMs) were proposed as NVMs have negligible leakage power. The main problem of utilizing NVMs across the SPM is their limited number of write cycles (endurance). This problem threatens the reliability of NVM-based SPMs. To alleviate the problem of limited endurance in NVM-based SPMs, this paper proposes a method, called overwrite purging through in-execution memory address snooping (OPTIMAS). The main idea behind the proposed method is to control the lifetime of NVM-based SPMs, directly by a hardware unit, outside of the SPM mapping algorithm. This idea...
Application of the Coset Construction Method in Theories of Spontaneous Symmetry Breaking: Gravitation as an Example
, M.Sc. Thesis Sharif University of Technology ; Torabian, Mahdi (Supervisor)
Abstract
In this manuscript we used the method of coset construction to describe theories of spontaneous symmetry breaking. The mathematical details are included in chapter 2. The utility of the method is that without any knowledge of the UV part of a theory we can construct IR part by just knowing the symmetry breaking pattern. We used the method for some symmetry breaking patterns to construct general relativity, massive gravity and also some symmetry breaking patterns corresponding to conformal gravity
The Assessment of Irregular Mid-Rise Steel Structures with Outriggers
, M.Sc. Thesis Sharif University of Technology ; Mofid, Masood (Supervisor)
Abstract
The system considered on this structure is for the design on mid-high Buildings from 15 and 20 floors above the base level and n floors below the base level and the limitation of the number of floors is due to the computer facility and restrictions. There is going to be an irregularity in some chosen floor at lower-floor, mid-floor, or upper-floor which is assuming one floor from the structure to have a different height with respect to the others. The height of the considered floor is going to increase up to 25% with respect to the other floors and the design of outriggers with these three assumptions is going to be assessed separately. In this system, a central core of steel is constructed...
Design and Efficient Implementation of Equalizer and Synchronizer Block in Recent Telecommunication Links Standards
, M.Sc. Thesis Sharif University of Technology ; Shabany, Mahdi (Supervisor)
Abstract
Today, telecommunication links transmit information wirelessly at high rates; The transmission channel is not ideal and the transmitted signal undergoes changes in the channel and then reaches the receiver; Also, the processing blocks in the transmitter and receiver are not completely similar and ideal; These two factors make it difficult for the receiver to recover the transmitted information and actually receives a signal that bears little resemblance to the transmitted signal. The most important effect that the channel has on the transmitted signal is due to the multi-path of the channel between the transmitter and the receiver, which causes a signal to reach the receiver through the...
Design and Baseband Hardware Implementation of LiFi WLAN Multi-User Modem
,
M.Sc. Thesis
Sharif University of Technology
;
Shabany, Mahdi
(Supervisor)
Abstract
In recent years, after the emergence of the benefits of optical wire communication, which successfully replaced electromagnetic technologies in some applications. Attention to wireless optical communication technologies has also increased. These technologies will also find their place in telecommunication systems after maturing according to the specific characteristics of light in the coming years. This thesis is a report on the implementation of a LiFi system, which aims to create a wireless local area network based on optical communication. Previously, reports have been written about the implementation of this system, but in this thesis, for the first time, the implementation of hardware...
The Impact of Penetration of Electric Vehicles on Distribution System Planning
, M.Sc. Thesis Sharif University of Technology ; Ehsan, Mahdi (Supervisor)
Abstract
The usage of plugin hybrid electric vehicles has environmental benefits. However, the penetration of these components raises important concerns for grid planning. Thus, it is necessary to model the load change due to their charge to investigate the impact of these vehicles on distribution networks. For this reason, it is necessary to determine the specifications of these vehicles, such as battery charge and energy consumption on daily trips. In addition, the study of some behavioral patterns of these vehicles and some experts are necessary to complete the model.In this thesis, an active distribution network is planned using dynamic programming formulation. In this model, some buses are added...
Toughness behavior in roll-bonded laminates based on AA6061/SiCp composites
, Article Materials Science and Engineering A ; Vol. 598 , 2014 , pp. 162-173 ; ISSN: 09215093 ; Pouraliakbar, H ; Bagheri, R ; Seyed Reihani, S. M ; Sharif University of Technology
2014
Abstract
Lamination has been shown to enhance damage tolerance of discontinuously reinforced aluminum (DRA) composites. Doing this technique, DRA layers could be laminated with ductile interlayers. In this research, two types of laminates consisting similar DRA layers and a ductile AA1050 interlayer were fabricated by means of hot roll-bonding. AA6061-5. vol% SiCp and AA6061-15. vol% SiCp composites were considered as exterior layers. Different rolling strains, was applied to control the interfacial strength which was examined by shear test. Toughness behavior of laminates was evaluated by three-point bending test in crack-divider orientation. Based on obtained results, the plastic deformation of...
AWARE: Adaptive way allocation for reconfigurable ECCs to protect write errors in STT-RAM caches
, Article IEEE Transactions on Emerging Topics in Computing ; 2017 ; 21686750 (ISSN) ; Farbeh, H ; Hosseini Monazzah, A. M ; Miremadi, S. G ; Sharif University of Technology
IEEE Computer Society
2017
Abstract
Spin-Transfer Torque Random Access Memories (STT-RAMs) are a promising alternative to SRAMs in on-chip caches. STT-RAMs face with a high error rate in write operations due to stochastic switching. To alleviate this problem, Error-Correcting Codes (ECCs) are commonly used, which results in a significant area and energy consumption overhead. This paper proposes an efficient technique, so-called Adaptive Way Allocation for Reconfigurable ECCs (AWARE), to correct write errors in STT-RAM caches. AWARE exploits the asymmetric error rate in cell switching directions, which leads to data-dependent write error rates, to reduce the ECC overheads without compromising the reliability of the cache. To...
Al-Mg-Si/SiC laminated composites: fabrication, architectural characteristics, toughness, damage tolerance, fracture mechanisms
, Article Composites Part B: Engineering ; Volume 125 , 2017 , Pages 49-70 ; 13598368 (ISSN) ; Pouraliakbar, H ; Bagheri, R ; Seyed Reihani, S. M ; Sharif University of Technology
2017
Abstract
Different architectures of layered laminates comprising two exterior layers of Al-Mg-Si/SiC metal matrix composite and an Al1050 ductile interlayer were fabricated by means of hot roll-bonding with applying different strains of εr = 39%, 51%, and 63%. For monolithics production, ceramic particulate reinforcement contents of 0, 5, 10, and 15 vol% were utilized. The aim of introducing ductile metal interlayer was to compensate the low toughness of composite layers and consequently enhancement of damage tolerance of bundled structures along with prevention of their catastrophic failure through activation of extrinsic toughening mechanism. Effects of architectural characteristics and fabrication...
An efficient Protection Technique for last level STT-RAM caches in multi-core processors
, Article IEEE Transactions on Parallel and Distributed Systems ; Volume 28, Issue 6 , 2017 , Pages 1564-1577 ; 10459219 (ISSN) ; Farbeh, H ; Hosseini Monazzah, A. M ; Miremadi, S. G ; Sharif University of Technology
IEEE Computer Society
2017
Abstract
Due to serious problems of SRAM-based caches in nano-scale technologies, researchers seek for new alternatives. Among the existing options, STT-RAMseems to be themost promising alternative.With high density and negligible leakage power, STT-RAMs open a new door to respond to future demands of multi-core systems, i.e., large on-chip caches. However, several problems in STT-RAMs should be overcome to make it applicable in on-chip caches.High probability of write error due to stochastic switching is amajor problemin STT-RAMs. Conventional Error-CorrectingCodes (ECCs) impose significant area and energy consumption overheads to protect STT-RAMcaches. These overheads in multi-core processors with...
AWARE: Adaptive way allocation for reconfigurable ECCs to protect write errors in STT-RAM caches
, Article IEEE Transactions on Emerging Topics in Computing ; Volume 7, Issue 3 , 2019 , Pages 481-492 ; 21686750 (ISSN) ; Farbeh, H ; Hosseini Monazzah, A. M ; Miremadi, S. G ; Sharif University of Technology
IEEE Computer Society
2019
Abstract
Spin-Transfer Torque Random Access Memories (STT-RAMs) are a promising alternative to SRAMs in on-chip caches. STT-RAMs face with a high error rate in write operations due to stochastic switching. To alleviate this problem, Error-Correcting Codes (ECCs) are commonly used, which results in a significant area and energy consumption overhead. This paper proposes an efficient technique, so-called Adaptive Way Allocation for Reconfigurable ECCs (AWARE), to correct write errors in STT-RAM caches. AWARE exploits the asymmetric error rate in cell switching directions, which leads to data-dependent write error rates, to reduce the ECC overheads without compromising the reliability of the cache. To...