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kahe--ghasem
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Optimal Model of Integrated Water Network to Reduce the Freshwater and Energy Consumption and Produce Wastewater at Power plant
, M.Sc. Thesis Sharif University of Technology ; Avami, Akram (Supervisor)
Abstract
In recent years, there has been the extensive researches on energy and water efficiency due to the increasing stress on these resources. Therefore, the water-energy nexus in large industries, especially power plants, has become very important. In the present study, the water and energy nexus has been analyzed using energy analysis tools, exergy, economic and environmental in a combined cycle power plant. The nexus are observed in the boiler blow-downs, leakage of steam traps, cooling of the air entering the compressor and injection of steam into the combustion chamber, which have been studied in different scenarios to improve water and energy consumption and reduce environmental impact. In...
On the gaussian characteristics of aggregated short-lived flows on high-bandwidth links
, Article Proceedings - 27th International Conference on Advanced Information Networking and Applications Workshops ; 2013 , Pages 860-865 ; 9780769549521 (ISBN) ; Jahangir, A. H ; Sharif University of Technology
2013
Abstract
Traffic modeling, traffic decomposition, and traffic engineering are some of the applications of traffic characterization that are mainly based on statistical characteristics of the network traffic. Many empirical analyses on Internet traffic traces show that the flow inter-arrival time distribution generally follows the Weibull distribution. As the scale of the network becomes larger, the Weibull distribution degrades to the Poisson distribution and when the flow arrival rate is high, it asymptotically converges to the Normal distribution. The aggregated traffic on high bandwidth links is the result of statistical multiplexing of many traffic sources, and the flow arrival rate on these...
A self-tuning controller for queuing delay regulation in TCP/AQM networks
, Article Telecommunication Systems ; 2018 ; 10184864 (ISSN) ; Jahangir, A. H ; Sharif University of Technology
Springer New York LLC
2018
Abstract
AQM router aims primarily to control the network congestion through marking/dropping packets which are used as congestion feedback in traffic sources to balance their flow rate. However, stabilizing queuing delay and maximizing link utilization have been considered as the main control objectives, especially in media dominated networks. Usually, most of the AQM algorithms are designed for a nominal operating point. However, time-varying nature of network parameters frequently violates their robustness bounds. In this paper, a self-tuning compensated PID controller is proposed to address the time-varying nature of network conditions caused by parameter variations and unresponsive connections....
A self-tuning controller for queuing delay regulation in TCP/AQM networks
, Article Telecommunication Systems ; Volume 71, Issue 2 , 2019 , Pages 215-229 ; 10184864 (ISSN) ; Jahangir, A. H ; Sharif University of Technology
Springer New York LLC
2019
Abstract
AQM router aims primarily to control the network congestion through marking/dropping packets which are used as congestion feedback in traffic sources to balance their flow rate. However, stabilizing queuing delay and maximizing link utilization have been considered as the main control objectives, especially in media dominated networks. Usually, most of the AQM algorithms are designed for a nominal operating point. However, time-varying nature of network parameters frequently violates their robustness bounds. In this paper, a self-tuning compensated PID controller is proposed to address the time-varying nature of network conditions caused by parameter variations and unresponsive connections....
A compensated PID active queue management controller using an improved queue dynamic model
, Article International Journal of Communication Systems ; Vol. 27, issue. 12 , 2014 , pp. 4543-4563 ; Jahangir, A. H ; Ebrahimi, B ; Sharif University of Technology
2014
Abstract
Beside the major objective of providing congestion control, achieving predictable queuing delay, maximizing link utilization, and robustness are the main objectives of an active queue management (AQM) controller. This paper proposes an improved queue dynamic model while incorporating the packet drop probability as well. By applying the improved model, a new compensated PID AQM controller is developed for Transmission Control Protocol/Internet Protocol (TCP/IP) networks. The non-minimum phase characteristic caused by Padé approximation of the network delay restricts the direct application of control methods because of the unstable internal dynamics. In this paper, a parameter-varying dynamic...
AQM controller design for TCP networks based on a new control strategy
, Article Telecommunication Systems ; Volume 57, Issue 4 , December , 2013 , Pages 295-311 ; 10184864 (ISSN) ; Jahangir, A. H ; Ebrahimi, B ; Sharif University of Technology
Kluwer Academic Publishers
2013
Abstract
When the network suffers from congestion, the core or edge routers signal the incidence of congestion through the active queue management (AQM) to the sources. The time-varying nature of the network dynamics and the complex process of retuning the current AQM algorithms for different operating points necessitate the development of a new AQM algorithm. Since the non-minimum phase characteristics of the network dynamics restrict direct application of the proportional-integral-derivative (PID) controller, we propose a compensated PID controller based on a new control strategy addressing the phase-lag and restrictions caused by the delay. Based on the unstable internal dynamics caused by the...
Dynamic Modeling and Congestion Control in Computer Networks
, M.Sc. Thesis Sharif University of Technology ; Jahangir, Amir Hossein (Supervisor) ; Ebrahim, Behrouz (Co-Advisor)
Abstract
Active queue management (AQM) is a key factor in congestion control and should provide appropriate feedback for flow control in traffic sources to overcome the congestion problem. Beside providing congestion control, achieving predictable queuing delay, maximizing link utilization, simplicity and robustness are also the main objectives of an AQM controller. We propose in this thesis an improved queue dynamic model while incorporating the packet drop probability as well. The proposed model is evaluated using ns2 platform. By applying the improved model, a new compensated proportionalintegral- derivative (PID) AQM controller is developed for TCP network. The time-varying nature of the network...
, M.Sc. Thesis Sharif University of Technology ; Miremadi, Ghasem (Supervisor)
Abstract
In recent years, the use of embedded processors has grown increasingly in wide range of computer systems; so that most of manufactured CPUs are used in emebedded systems many of which are safty-critical systems such as medical devices, aircraft flight control, space systems, nuclear systems, etc. The incidence of failure in these systems can cause irreversible damages on human life, financial or environmental matters. Silicon process technology trends, such as reducing the threshold voltage, increasing the frequency and decreasing the size of transistors, not only caused increase in single-bit fault rate but also caused occurance of multi-bit faults. Due to importance ofcorrect operation of...
Design of Robust Digital Circuits Against Soft Errors Considering Multiple Event Transients Fault (METs)
, M.Sc. Thesis Sharif University of Technology ; Miremadi, Ghasem (Supervisor)
Abstract
Nowadays, one of the most important challenges in the design of digital circuits is their susceptibility to the strike of high energy particles which leads to the Single Event Transient (SET) and Multiple Event Transients (MET). In fact, technology scaling which results in lower supply voltage, higher operating frequency, and lower nodal capacitance, makes today’s digital circuits more susceptible not only to high energy particles but also to low energy particles. Moreover emerging deep sub-micron technologies and the integration of more cells in today’s chips have caused higher probability of MET occurrences. A lot of research has tried to reduce the soft error rate due to high energy...
Design and Implementation of a Fault-Tolerant Routing Algorithm in WSNs
, M.Sc. Thesis Sharif University of Technology ; Miremadi, Ghasem (Supervisor)
Abstract
Wireless Sensor Networks (WSNs) are prone to faults due to battery depletion of nodes, where a node failure can disturb routing, as it plays a key role in transferring sensed data to the end users. A WSN may be partitioned into groups of nodes called clusters; for every cluster, there is a node, called Cluster Head (CH) that is responsible for collecting and transferring data from all nodes in that cluster. This means that the CH is a single point of failure; i.e., once a CH fails, the whole cluster will fail, which leads to inability of its members for transferring data outside the cluster. This thesis presents a Fault-Tolerant and Energy-Aware algorithm (FTEA), which prolongs the lifetime...
Fault-Tolerant Implementation of Erasure Codes for Storage Systems
, M.Sc. Thesis Sharif University of Technology ; Miremadi, Ghasem (Supervisor)
Abstract
The increasing size of valuable data emphasizes the importance of applying reliability in storage systems. One way to protect storage system failures is using erasure codes. The advantages of using erasure codes are their low overheads and high reliability. Soft errors caused by high-energetic particles do not only corrupt data in the SSD-based storage systems, but also in the erasure codes. In this regards, it is important to protect erasure code implementations against soft errors. This thesis proposes a fault-tolerant implementation of erasure codes. The proposed method is based on the structure of each erasure code. This method is analytically evaluated on four erasure codes, i.e....
Soft Error Rate Estimation in Presence of Multiple Event Transients (METs)
, M.Sc. Thesis Sharif University of Technology ; Miremadi, Ghasem (Supervisor)
Abstract
With continuous device down-scaling and increase in transistor counts on a chip, complementary metal-oxide-semiconductor (CMOS) technology has become extremely sensitive to soft errors. Soft errors are transient errors caused by energetic particles such as neutrons and alpha particles. An essential step to design a soft error tolerant digital system with minimal performance and power overheads is Soft Error Rate (SER) estimation of system components. Until recently, Single Event Upsets (SEUs) in latches and Filp-Flops (FFs) and Single Event Transients (SETs) in combinational logic parts of digital circuits were regarded as the main effects of particle strikes. However, with the emerging...
Design and Evaluation of a Master/Checker Method for an Embedded Processor
, M.Sc. Thesis Sharif University of Technology ; Miremadi, Ghasem (Supervisor)
Abstract
Ever increasing applications of embedded systems have motivated the designers to pay special attention to the design requirements of such systems. Among embedded applications, safety-critical systems have high reliability requirements as failures in such systems may endanger human life or result in catastrophic consequences. Embedded processors as the computation cores of embedded systems are very crucial from reliability point of view. This is because; a failure in the processor most probably leads to a system failure. One effective way to protect embedded processors against environmental faults is to use system level fault-tolerant techniques such as Master/Checker (M/C) or Triple Modular...
Design of Fault Tolerant Processor for Implementation on SRAM Based FPGAs
, M.Sc. Thesis Sharif University of Technology ; Miremadi, Ghasem (Supervisor)
Abstract
Vulnerability of SRAM-based FPGAs to soft errors signals the importance of applying fault-tolerant methods in FPGAs used in safety-critical applications. Previous methods to protect SRAM-based FPGAs impose significant area and power overheads. Additionally, they suffer from susceptibility of configuration bits to Single Event-Multiple Upsets (SEMU). This thesis presents a Highly Available Fault-Tolerant Architecture (HAFTA) to protect SRAM-based FPGA designs against SEMUs in both configuration and user bits. In HAFTA, the entire design is duplicated and the main and replica flip-flops are compared at each clock cycle to detect any possible mismatch. To save the latest correct state of the...
Design of Fault-tolerance Mechanisms for Soft Multiprocessors
, M.Sc. Thesis Sharif University of Technology ; Miremadi, Ghasem (Supervisor)
Abstract
Increasing complexity of embedded systems and the need for more computation powerhave directed designers toward using of multiprocessors. SRAM-based FPGAs are suitable platforms for implementation of multiprocessors due to thier low cost, fast time-to-market and re-configurability. FPGA-based multiprocessors are known as soft multiprocessors. The large area of SRAM-based FPGAs is occupied by configuration bits. Configuration bits are vulnerable to high energy particles that can lead to soft errors. In this regards, it is of decisive importance to protect soft multiprocessors against soft errors. This thesis proposes a fault-tolerant method for soft multiprocessors that can detect and...
Reliability Enhancement of SSD-based Storage Systems Using Erasure Codes
, M.Sc. Thesis Sharif University of Technology ; Miremadi, Ghasem (Supervisor)
Abstract
The use of flash-based Solid State Disks (SSDs) has been increased in the past decades because of their high performance and low power consumption. As SSDs have no moving mechanical parts, they are more reliable than HDDs. SSDs have specific errors, such as read, program, and erase disturbs, data retention, and endurance. It is so common in storage systems to apply an array of disks called Redundant Array of Independent Disks (RAID) together for the aim of reliability and performance. Erasure codes are one of the main methods applied in storage systems for the aim of reliability. Erasure codes increase the reliability of storage systems by protecting them against disk failures and sector...
Reliability Improvement of On-chip Memories
, Ph.D. Dissertation Sharif University of Technology ; Miremadi, Ghasem (Supervisor)
Abstract
Reliability, performance, and energy consumption are among the most important constraints that should be satisfied in modern processors design. More than 60% of the chip area is occupied by on-chip SRAM memories and they not only contribute in a large fraction of energy consumption, but also are the most error-prone components. Radiation-induced soft errors in on-chip memories are a major concern in modern processors design. Although Single Event Upsets (SEUs) have been known to be the main concern regarding SRAM memory reliability over the past decades, with the continued downscaling of technology, the occurrence rate of Multiple-Bit Upsets (MBUs) is comparable to that of SEUs in today’s...
Reliability Improvement in Network on Chips against Crosstalk Fault Considering Five-Wire Latency Model
, M.Sc. Thesis Sharif University of Technology ; Miremadi, Ghasem (Supervisor)
Abstract
One of the major challenges that threat the reliability of NoC-based systems is Crosstalk fault. Some effects of crosstalk fault such as Rising/falling delays and rising/falling speed-ups lead to the variations in channel delay, incorrect data transmission, and extra power consumption in NoC communication channels. Crosstalk fault is data dependent and the intensity of this fault seriously depends on the transition patterns appearing on the wire during the data traversal between processing elements. Most of mechanisms tackling crosstalk fault that are discussed in literature are based on 3-wire delay model. In 3-wire delay model, one wire is considered as victim wire and classification of...
Crosstalk Fault Treatment in NoCs Using Data Manipulation
, Ph.D. Dissertation Sharif University of Technology ; Miremadi, Ghasem (Supervisor)
Abstract
Recent advances in Very-Large-Scale Integration (VLSI) technologies have enabled designers to integrate a large number of Processing Elements (PEs) on a single die. According to International Technology Roadmap for Semiconductors (ITRS), the number of PEs will reach 5000 on a single die in 2021. Although the main achievements of such rapid advancement in chips are high processing speed, shrinkage of technology size has made chips highly sensitive to different challenges. Networks on chip (NoCs), as an example of these systems, are not exempted from these challenges. Crosstalk fault is one of the major fault resources in NoCs. Crosstalk faults occur due to coupling capacitances between...
Designing and Implementing a Cluster-based Energy-aware Routing Algorithm for Wireless Sensor Network
, M.Sc. Thesis Sharif University of Technology ; Miremadi, Ghasem (Supervisor)
Abstract
Wireless Sensor Networks (WSNs) consist of sensor nodes that are connected to each other and are widely used in many applications to acquire and process information. WSN nodes are battery powered, therefore energy management is a key factor for long live network. Node radio transceiver unit uses the most part of energy resource of the node and as a result limits the network lifetime. One way to prolong lifetime of network is to utilize routing protocols to manage energy consumption. To have an energy efficient protocol, we can apply cluster organization on the network, where sensor nodes are partitioned into groups called cluster. Then, the whole cluster data is sent through Cluster Head...