Loading...
Search for:
saeedi--m
0.233 seconds
Total 20593 records
Noise canceling balun-LNA with enhanced IIP2 and IIP3 for digital TV applications
, Article IEICE Transactions on Electronics ; Volume E95-C, Issue 1 , 2012 , Pages 146-154 ; 09168524 (ISSN) ; Atarodi, M
2012
Abstract
An inductorless low noise amplifier (LNA) with active balun for digital TV (DTV) applications is presented. The LNA exploits a noise cancellation technique which allows for simultaneous wide-band impedance matching and low noise design. The matching and amplifier stages in the LNA topology perform single-ended to differential signal conversion with balanced output. The second and third-order nonlinearity of the individual amplifiers as well as the distortion caused by the interaction between the stages are suppressed to achieve high IIP2 and IIP3. A method for intrinsic cancellation of the second-order interaction is employed to reduce the dependence of the IIP3 on the frequency spacing...
Single-VCO multi-band DTV frequency synthesizer with a divide-by-3 frequency divider for quadrature signal generation
, Article Analog Integrated Circuits and Signal Processing ; Volume 64, Issue 2 , 2010 , Pages 103-113 ; 09251030 (ISSN) ; Atarodi, M ; Sharif University of Technology
2010
Abstract
A multi-band frequency synthesizer for In-phase and Quadrature (I/Q) LO signal generation in Digital TV tuners is presented. Using divisor numbers other than powers of 2 (2 n ) for quadrature generation, reduces the required frequency range of the VCO, hence the number of VCO circuits, in multi-band frequency synthesizers. In the proposed synthesizer, VHF, UHF and L-band frequencies are covered with only one VCO. This is achieved by using a novel divide-by-3 circuit which produces precise I/Q LO signals. The VCO tuning range in this design is 2,400-3,632 MHz which is covered by a 6-bit switched-capacitor bank. A fast adaptive frequency calibration block selects the closest VCO frequency to...
Second and third-order distortion suppression technique for noise canceling CMOS LNAs
, Article IEICE Electronics Express ; Volume 6, Issue 13 , 2009 , Pages 959-965 ; 13492543 (ISSN) ; Atarodi, M ; Sharif University of Technology
2009
Abstract
A technique for simultaneous cancellation of noise, second-order distortion and third-order distortion in CMOS LNAs is presented. The proposed LNA topology consists of a matching stage and two common-source amplifier stages, performing single-ended to differential signal conversion with balanced output. The second and third-order nonlinearity of the individual amplifiers as well as the distortion caused by the interaction between the stages are suppressed to achieve high IIP3. A method for intrinsic cancellation of the second-order interaction is employed to reduce the dependence of the IIP3 on the frequency spacing between the interfering signals in the two-tone test. © IEICE 2009
A multi-band frequency synthesizer for DVB-H
, Article International Review of Electrical Engineering ; Volume 4, Issue 5 , 2009 , Pages 1110-1116 ; 18276660 (ISSN) ; Atarodi, M ; Sharif University of Technology
2009
Abstract
A fully integrated multi-band frequency synthesizer for Inphase and Quadrature local oscillator signal generation in Digital Video Broadcasting to Handheld receivers is presented. In the proposed PLL-based integer-N synthesizer, all of the allocated frequencies for DVB tuners, in VHF, UHF and L bands, are generated. Two voltage controlled oscillators cover a frequency range of 1880-3632 MHz by using switched-capacitor banks. The VCO frequency is divided by 2, 4 and 16 to generate the quadrature signals at the synthesizer output. A fast adaptive frequency calibration block selects the closest VCO frequency to the target frequency by setting the capacitor bank control code prior to the start...
Fluid–structure interaction simulation of a cerebral aneurysm: effects of endovascular coiling treatment and aneurysm wall thickening
, Article Journal of the Mechanical Behavior of Biomedical Materials ; Volume 74 , 2017 , Pages 72-83 ; 17516161 (ISSN) ; Nejad, M. A ; Saeedi, M ; Sharif University of Technology
2017
Abstract
In the present study, we investigate the effect of the hemodynamic factors of the blood flow on the cerebral aneurysms. To this end, a hypothetical geometry of the aneurysm in the circle of Willis, located in the bifurcation point of the anterior cerebral artery (ACA) and anterior communicating artery (ACoA) is modeled in a three-dimensional manner. Three cases are chosen in the current study: an untreated thin wall (first case), untreated thick wall (second case), and a treated aneurysm (third case). The effect of increasing the aneurysm wall thickness on the deformation and stress distribution of the walls are studied. The obtained results showed that in the second case, a reduction in the...
A divide-by-3 frequency divider for I/Q generation in a multi-band frequency synthesizer
, Article APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems, Macao, 30 November 2008 through 3 December 2008 ; 2008 , Pages 1383-1386 ; 9781424423422 (ISBN) ; Atarodi, M ; Sharif Bakhtiar, M ; Sharif University of Technology
2008
Abstract
A divide-by-3 frequency divider for Inphase and Quadrature (I/Q) LO signal generation in a multi-band frequency synthesizer is presented. Using divisor numbers other than powers of 2 (2n) for quadrature signal generation, reduces the required frequency range of the VCO in multi-band frequency synthesizers. The divide-by-3 circuit is designed in a 0.18um CMOS technology. © 2008 IEEE
A DLL-based frequency synthesizer for VHF DVB-H/T receivers
, Article 2010 11th International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design, SM2ACD 2010, 4 October 2010 through 6 October 2010 ; October , 2010 ; 9781424468164 (ISBN) ; Sharifkhani, M ; Saeedi, S ; Atarodi, M ; Sharif University of Technology
2010
Abstract
This paper presents a new architecture for a DLL based frequency synthesizer for wireless transceivers. Owing to its DLL based nature, the synthesizer generates the target frequencies with minimum phase noise. The proposed architecture takes the advantage of a combination of a frequency divider and an edge combiner to create the desired frequencies. As an example, the synthesizer is adopted to create the channel frequencies of French DVB-H/T standard. The circuit level design guidelines and power consumption trade-offs are presented. It was shown that for the mentioned standard a mere 6 stage delay line is sufficient. Simulation results confirm the analytical predictions
Design method for a reconfigurable CMOS LNA with input tuning and active balun
, Article AEU - International Journal of Electronics and Communications ; Vol. 69, issue. 1 , January , 2014 , p. 424-431 ; Atarodi, M ; Saeedi, S ; Sharif University of Technology
2014
Abstract
A method to design a tunable low noise amplifier (LNA) for multiband receivers is proposed. This paper also presents a single-ended to differential conversion (S2DC) topology which improves the LNA linearity without degrading its noise performance. Combining input tuning with S2DC in a single stage reduces power consumption of the LNA and decreases effects of supply noise. An LNA has been designed based on the proposed method for 2.3-4.8 GHz in a 0.18 μm CMOS technology. Simulations show an IIP3 of -3.2 dBm, a less than 3.7 dB noise figure (NF), a voltage gain of 24 dB in the whole frequency range. The LNA draws 13.1 mW from a 1.8 V supply. The results indicate that the proposed tuning...
Low phase noise on-chip oscillator for implantable biomedical applications
, Article Proceedings - IEEE International Symposium on Circuits and Systems ; 2011 , Pages 213-216 ; 02714310 (ISSN) ; 9781424494736 (ISBN) ; Atarodi, M ; Saeedi, S ; Sharif University of Technology
2011
Abstract
On-chip accurate clock references are one of the essential building blocks in fully integrated Systems-On-Chips (SOC). In this paper, a low phase noise, temperature and supply voltage independent clock reference is presented. It provides the reference frequency for a biomedical implantable system. The simulated phase noise at 100 KHz offset from 2MHz carrier is 113dBc/Hz. Simulations show the frequency remains within 0.34% of the nominal oscillation frequency in the operating voltage range of 1.7 - 1.9 V without any calibration and its change in the temperature range of 20-to100C is 0.5%. The circuit consumes 77W and is designed in a 0.18m technology with 1.8V supply voltage
Modeling of DLL-based frequency multiplier in time and frequency domain with Matlab Simulink
, Article IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS, 6 December 2010 through 9 December 2010 ; 2010 , Pages 1051-1054 ; 9781424474561 (ISBN) ; Sharifkhani, M ; Saeedi, S ; Sharif University of Technology
2010
Abstract
A systematic procedure of simulating charge pump based delay locked loops (DLLs) represents in this paper. The presented procedure is based on the systematic modeling of the DLL components in Matlab Simulink simulator. The system has been designed for 1Hz input clock signal that by changing the whole system scale, it can be used for every other input frequencies. The simulation results in Matlab and design considerations for DLL based frequency multiplier are presented
Clipping noise cancellation in OFDM systems using oversampled signal reconstruction
, Article IEEE Communications Letters ; Volume 6, Issue 2 , 2002 , Pages 73-75 ; 10897798 (ISSN) ; Sharif, M ; Marvasti, F ; Sharif University of Technology
2002
Abstract
Clipping the OFDM signals in the digital part of the transmitter is one of the simplest methods to reduce the peak factor. However, it suffers from additional clipping distortion, peak regrowth after digital to analog conversion, and out-of-band radiation in the case of oversampled sequence clipping. In this letter, we use oversampled sequence clipping to combat the effect of peak regrowth and propose a method to reconstruct the clipped samples and mitigate the clipping distortion in the presence of channel noise at the expense of bandwidth expansion. We show through extensive simulations that by slightly increasing the bandwidth of the system, we can significantly improve the performance...
A low voltage 14-bit self-calibrated CMOS DAC with enhanced dynamic linearity
, Article Analog Integrated Circuits and Signal Processing ; Volume 43, Issue 2 , 2005 , Pages 137-145 ; 09251030 (ISSN) ; Mehrmanesh, S ; Atarodi, M ; Sharif University of Technology
2005
Abstract
A 1-V CMOS current steering digital to analog converter with enhanced static and dynamic linearity is presented. The 14-bit static linearity is achieved by a background analog self calibration technique which is suitable for low voltage applications and does not require error measurement and correction circuits. To improve dynamic linearity at high frequencies a track/attenuate output stage is used at the DAC output. Integral and differential nonlinearities of the proposed DAC corresponding to 14-bit specification are less than 0.35 and 0.25 LSB respectively. The DAC is functional up to 400MS/s with SFDR better than 71 dB in the Nyquist band. The circuit has been designed and simulated in a...
Inhibiting asphaltene precipitation from Iranian crude oil using various dispersants: Experimental investigation through viscometry and thermodynamic modelling
, Article Fluid Phase Equilibria ; Volume 442 , 2017 , Pages 104-118 ; 03783812 (ISSN) ; Badizad, M. H ; Sharif University of Technology
Elsevier B.V
2017
Abstract
Asphaltene precipitation is a major assurance problem posing significant technical and economic loss on petroleum industry. To tackle this issue, various treatments have been proposed and applied by industry. Amongst, inhibiting or retarding the asphaltene precipitation has been understood as the most efficient approach. In this regard, blending crude oil with chemical additives could appreciably heighten its stability. Surfactants, owing to amphiphilic nature, could keep asphaltene dissolved in crude oil by precluding self-tendency of those particles to making agglomerates. Despite importance of this subject, there is still lack of sufficient experimental data to evaluate effectiveness of...
Effect of magnetic field treatment on interfacial tension of CTAB nano-emulsion: developing a novel agent for enhanced oil recovery
, Article Journal of Molecular Liquids ; Volume 261 , July , 2018 , Pages 107-114 ; 01677322 (ISSN) ; Badizad, M. H ; Sharif University of Technology
Elsevier B.V
2018
Abstract
Nanoemulsion is a novel type of emulsified solutions holding great promises for utilizing in industrial applications. Although microemulsions have been the subject of numerous studies in past decades, however, nanoemulsions are quite virgin and merit detailed investigation to scrutinize their characteristics specific to reservoir engineering, in particular, Enhanced Oil Recovery (EOR). To this end, the present study is an attempt to evaluate the effectiveness of a specific nanoemulsion for oil displacement through porous media. In this regard, flooding experiments were designed and Hexa decyl trimethylammonium bromide (CTAB), which is a cationic surfactant, was used as the emulsifying agent....
Impact of ionic composition on modulating wetting preference of calcite surface: Implication for chemically tuned water flooding
, Article Colloids and Surfaces A: Physicochemical and Engineering Aspects ; Volume 568 , 2019 , Pages 470-480 ; 09277757 (ISSN) ; Badizad, M. H ; Sharif University of Technology
Elsevier B.V
2019
Abstract
Despite previous researches on ion-engineered waterflooding (IEWF), its underlying mechanisms are not fully understood, particularly in presence of additives, like surfactants. This paper concerned with the contribution of Ca 2+ , Mg 2+ , SO 4 2- and Na + into altering wettability of oil-wet carbonate minerals towards water preferred state. As a mechanistic study, an experiment workflow was conducted to probe the impact of ions' concentrations in SW, either with or without sodium dodecylbenzene sulfonate (SDBS) which is an anionic surfactant. At first, contact angle (CA) measurement was carried out to evaluate the degree of wettability reversal upon treating the oil-aged calcite slabs with...
Extending application of Dehaghani Association Equation of State for Modeling Phase Behavior of Water-Alcohol Systems
, Article Fluid Phase Equilibria ; Volume 482 , 2019 , Pages 126-133 ; 03783812 (ISSN) ; Badizad, M. H ; Sharif University of Technology
Elsevier B.V
2019
Abstract
This paper concerns extending applicability of Dehaghani association equation of state (in short DA-EOS) to model non-ideality in phase behavior caused by hydrogen bonding. Advantageously, this equation only needs two and one parameters to treat self- and cross association, respectively, which were determined for methanol/water and ethanol/water mixture in this study. In this respect, DA was coupled with PR and SRK EOS to account for physical interaction between molecules. Notably, DA-PR persistently provides more accurate prediction than DA-SRK for both aqueous methanol and ethanol solutions
High performance fuzzy-Padé controllers: Introduction and comparison to fuzzy controllers
, Article Nonlinear Dynamics ; Volume 71, Issue 1-2 , January , 2013 , Pages 141-157 ; 0924090X (ISSN) ; Yoon, Y. J ; Saeedi Hosseiny, M. S ; Sharif University of Technology
2013
Abstract
In this paper, a new highly convergent, efficient, and fast response control technique entitled as fuzzy-Padé control method is introduced. It provides a simple methodology to exploit the heuristic knowledge in controlling a system. Fuzzy-Padé controllers originate from a unification of heuristic knowledge expressed as the rule base, and Padé approximants. In this method, fuzzy singleton rules are used to generate the rule base. Accordingly, unknown parameters in the Padé approximant are determined using these rules. The fuzzy-Padé controllers possess certain advantages over fuzzy controllers, and they can be applied in situations where fuzzy controllers previously failed. To demonstrate the...
Systematic modeling and simulation of DLL-based frequency multiplier
, Article 2010 11th International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design, SM2ACD 2010, 4 October 2010 through 6 October 2010 ; 2010 ; 9781424468164 (ISBN) ; Sharifkhani, M ; Ebrahimi, A ; Saeedi, S ; Atarodi, M ; Sharif University of Technology
2010
Abstract
This paper represents a systematic procedure of simulating charge pump based delay locked loops (DLLs). The presented procedure is based on the systematic modelling of the DLL components in Matlab simulink simulator. The system has been designed for 1Hz input clock signal that by changing the whole system scale, it can be used for every other input frequencies. The simulation results in Matlab and design considerations for DLL based frequency multiplier are presented
Developing a novel colloidal model for predicting asphaltene precipitation from crude oil by alkane dilution
, Article Journal of Molecular Liquids ; Volume 318 , 2020 ; Badizad, M. H ; Dehghanizadeh, M ; Saeedi Dehaghani, A. H ; Sharif University of Technology
Elsevier B.V
2020
Abstract
This research aims to propose a thermodynamic model for predicting asphaltene precipitation upon diluting a crude oil with a paraffinic solvent. To this end, a thorough mathematical formulation was carried out to derive a novel micellization model based on the associative properties of asphaltenic compounds. It was assumed that asphaltenes exist in the oil both as monomeric molecules and aggregated cores; with stabilization latter by attachment of resin on its periphery. The aggregation equilibrium was established by taking into account asphaltene's lyophobic tendency, heat of resin adsorption, and interfacial tension between micelle and oil media which is the main driving factor...
A technique to suppress tail current flicker noise in CMOS LC VCOs
, Article ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Kos, 21 May 2006 through 24 May 2006 ; 2006 , Pages 3229-3232 ; 02714310 (ISSN); 0780393902 (ISBN); 9780780393905 (ISBN) ; Mehrmanesh, S ; Tajalli, A ; Atarodi, M ; Sharif University of Technology
2006
Abstract
A technique to reduce close-in phase noise in CMOS LC voltage controlled oscillators is proposed. In CMOS differential LC oscillators, the up-conversion of flicker noise mainly determines the close-in phase noise. The flicker noise of the bias current is a major component contributing to the overall low frequency noise. In this paper, a switched biasing technique to suppress the flicker noise of the bias circuit is presented. A 1.8v 2.4GHz differential LC VCO is designed in a 0.18u CMOS technology using this technique. With the proposed switching technique, the close in phase noise is improved as much as 15dB at 500 kHz offset. The simulated phase noise at the offsets of 500 kHz and 1 MHz is...