Sharif Digital Repository

In nanometer-scale process technologies, the effects of process variations are observed in Multiprocessor System-on-Chips (MPSoC) in terms of variations in frequencies and leakage powers among the processors on the same chip as well as across different chips of the same design. Traditionally, worst-case values are assumed for these parameters and then a deterministic optimization technique is applied to the MPSoC application under design. We show that such worst-case-based approaches are not optimal with the increasing variation observed at system-level, and instead, statistical approaches should be employed. We consider the problem of simultaneously choosing MPSoC architecture and task... 

Corner-case analysis is a well-known technique to cope with occasional deviations occurring during the manufacturing process of semiconductors. However, the increasing amount of process variation in nanometer technologies has made it inevitable to move toward statistical analysis methods, instead of deterministic worst-case-based techniques, at all design levels. We show that by statically considering statistical effects of random and systematic process variation on performance and power consumption of a Multiprocessor System-on-Chip (MPSoC), significant power improvement can be achieved by static software-level optimizations such as task and communication scheduling. Moreover, we analyze... 

New technologies such as smart homes and appliances and renewable energy production have been attracting much attention in recent years. In practice, the management of these technologies to get the minimum household payment has become a challenge due to the time-varying electricity price. In this paper, we propose a real time energy management system to manage the appliances and storages. The solar energy is charged in the storages and used together with the grid electricity to supply the appliances. The proposed management system uses an ILP-based Home Energy Management (ILPHEM) optimization engine. ILPHEM schedules appliances requests and storage usage based on updated real time input data... 

Increasing delay and power variation has become a major challenge to designing high performance Multiprocessor System-On-Chips (MPSoC) in deep sub-micron technologies. As a result, a paradigm shift from deterministic to statistical design methodology at all levels of the design hierarchy is inevitable. In this paper, we propose a static variation-aware task scheduling and power mode selection algorithm for MPSoCs. The proposed algorithm is able to maximize the total power yield of the chip under a given performance yield constraint by searching for the optimal task scheduling and power mode selection policy for a specified multiprocessor platform. Experimental results are gathered by... 

Parameter variations reveal themselves as different frequency and leakage powers per instances of the same MPSoC. By the increasing variation with technology scaling, worst-case-based scheduling algorithms result in either increasingly less optimal schedules or otherwise more lost yield. To address this problem, this paper introduces a variationaware task and communication scheduling algorithm for multiprocessor system-on-chip (MPSoC). We consider both delay and leakage power variations during the process of finding the best schedule so that leakier processors are less utilized and can be more frequently put in sleep mode to reduce power. Our algorithm takes advantage of event tables to...