Sharif Digital Repository

Reconfigurable devices are a popular platform invarious computational fields due to having high performance and flexibility and low non-recurring engineering cost. Generous flexibility of Look-up Tables (LUTs) in implementing arbitrary functions comes withsignificant area and performance overheads as compared with their Application Specific Integrated Circuit (ASIC) equivalent. One approach to alleviate such overheads is to use less flexible logic elements capable to implement majority of logic functions. In this thesis, we first investigate the most frequently used functions in standard benchmarks and then design a set of less-flexible but area-efficient logic cells, called Hard Logics... 

The advancement of technology in the semiconductor industry and the resulting increase in the number of transistors on a chip has led to an increase in the number of processing cores an increase in the number of processing cores in a system on chip (SoC). A surge in the number of processing cores, makes their communication more and more noteworthy. This communication is established through the network on chip (NoC). One of the main challenges in NoC design is power management, as it constitutes a high percentage of the overall power consumption of the chip. One of the most power-hungry components of NoC is the router. According to our observation, some of the components of the routers are...