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Design of RF Receiver Front-End for Low Power Applications
, Ph.D. Dissertation Sharif University of Technology ; Medi, Ali (Supervisor) ; Meghdadi, Masoud (Co-Supervisor)
Abstract
The quest for reducing power consumption, external components and chip area in integrated circuits is never ended. One of the solutions is to use circuit re-use techniques whereas most of the blocks have multi tasks in the architecture. Besides that, the bias current is shared between the various parts of the system. Consequently, the total power and chip area are reduced. This thesis introduces Blixator (Balun, LNA, Mixer and Oscillator) circuit as a new generation of circuit and current re-use topologies for low power applications. The receiver has been designed for BLE applications. It exhibits a NF of 10.5 dB, IIP3 of -15.5 dBm, IRR of 23 dB, input impedance matching of -15 dB in 80 MHz...