Sharif Digital Repository

It is now possible to integrate hundreds of modules (e.g. processors, memories) in a single silicon die. Handling the communication requirements between such modules by interconnecting them using shared buses is not possible from the performance point of view. One of the solutions is to use a network-on-chip (NoC) based communication infrastructure. NoCs were shown to be effective for solving the global interconnection problem among modules. These architectures emphasize the separation between computing and communication, and guarantee a good degree of design reuse and scalability. Mesh topology is favored by many researchers as the topology of NoCs because of its layout efficiency.... 

There is a strong drive toward handheld communication devices with building blocks that are fully integrated in standard CMOS technologies. Although there are obvious cost, size, and repeatability advantages, it is particularly challenging to implement fully integrated power amplifiers with no external matching in standard CMOS under the large supply variations and harsh load mismatches present in handheld devices. This Project deals with the front-end of an Integrated RFID Reader for the UHF band. The bottleneck of the design is the design of a fully on-chip Power Amplifier. In this thesis, a new method is introduced to increase transistors breakdown voltage in a class E power amplifier.... 

Nowadays, the use of gas turbines with low capacity have acceptance in large quantity. This type of gas turbines with a capacity of approximately 5-200kW are known as microturbines. This type of turbines due to the existence of limitations on increasing of turbine inlet temperature and compressor pressure ratio has low efficiency compared to the turbine with high capacity. Therefore the use of a recuperator in the cycle is necessary. Optimum design of heat recuperator has important effect on improving of gas turbine cycle efficiency. In this project for optimum design of heat recuperator, the effect of recuperator on gas turbine cycle efficiency is studied. By determining geometric... 

In this dissertation, our aim is to evaluate a model linking “Teamwork Quality” and “Innovative Team Climate”. Teamwork Quality is defined as the quality of interactions among team members that includes six dimensions: “Communication”, “Coordination”, “Balance of Contribution”, “Mutual Support”, “Effort”, and “Cohesion”. Innovative Team Climate refers to shared perceptions of team policies, practices and procedures in support of innovation. This construct is composed of four dimensions: “Vision”, “Participation Safety”, “Task Orientation”, and “Support of Innovation”. Firstly, we hypothesized that there are positive relations between Innovative Team Climate and Teamwork Quality itself and... 

Measurement of efficiency is a significant issue in organizations which is used to improvement efficiency and performance .one of the serious offaires in any country, is banking, inefficiency in which leads to problems and obstacles in developing capital market. In this research, Data Envelopment Analysis models are used to estimate the extent of performance in decision making units (DMU’s) to improve inefficient ones. We change the inputs ( outputs) to a special unit at both the constancy or improvement of efficiency using the DEA models, we estimate the values of output ( input ) levels. Howeve, we assume the data of (the values of input ( output ) levels ) can be either crisp or interval.... 

The LQG theory made its appearance in the fifties and sixties. It has now become one of the standard methods for compensator design. Despite the existing powerful tools in modern control, there seems to be few or no systematic approaches proposed for determining the weighting and root matrices which are the free parameters of the compensator. These matrices are often found by trial-and-error. Initially, this thesis presents an iterative algorithm for determining the compensator parameters. The algorithm is based upon making corrections to the singular values graphs in order to enhance closed-loop performance and robustness. This is how the traditional intuitive trial-and-error approach is... 

In this thesis, we propose a processor allocation mechanism for run-time assignment of a set of communicating tasks of input applications onto the processing nodes of a Chip Multiprocessor (CMP), when the arrival order and execution life-time of the input applications are not known a priori. This mechanism targets the on-chip communication and aims to reduce the power and latency of the Network-on-Chip (NoC). In this work, we benefit from the advantages of non-contiguous processor allocation mechanisms, by allowing the tasks of the input application to be mapped onto disjoint regions (sub-meshes) and then virtually connecting them by bypassing the router pipeline stages of inter-region... 

Solid-State Disks (SSDs) offer advantages such as no mechanical parts, low power consumption, and constant read latency. SSDs, however, suffer from shortcomings such as erase-before-update requirement and limited endurance.Redundant Array of Independent Disks (RAID) are commonly used in storage servers to enhance performance and reliability. To further enhance system performance, one can employ efficient Input/Output (I/O) scheduling algorithms suitedto the disk structure in RAID-based systems.In this thesis, we present an I/O scheduling method to improve endurance and performance of SSD-based RAID systems. In the proposed I/O scheduling algorithm, read requests are sent directly to SSDs and... 

Nowadays, enterprise storage systems are widely used in data centers such as databases, servers, and bank institutes. Due to mechanical activity of disk drives, these systems are one of the most power consumptive components in data centers. Prefetching and RAID, which are employed to enhance performance, are widely used in data storage systems. These two methods, however, impose significant energy overhead to the system due to the increased disk activity. In this thesis, we first elaborate shortcomings of prefetching and RAID methods. Then, we propose a new energy efficient and RAID-compatible prefetching method (LPTAP), which aims at improving performance and energy consumption. To evaluate... 

Grammar-based software's are the software's that their input can be expressed according to the grammars for example, reverse engineering software's, evolutional counting's, adjustable programming in product line and XML controllers are in this category; so we can use this capability of the software in its testing .In the field of criteria for the test coverage of the grammar-based software, 5 criteria have been offere so far, which contain rule coverage criterion, context-dependant rule coverage criterion, length-n successor coverage criterion, loop-K coverage criterion and full coverage criterian, any of which have benefits and defeats. The first questions which are asked in this field is... 

Power Amplifiers are key components in new modern communication systems such as space and airborne applications, point to point networks and phase array modules. There are miscellaneous challenges in designing power amplifiers based on application and type of the system; high power, gain, bandwidth, linearity, efficiency, reliability, cost and size. Compromising among existence trade-offs is the state of the art for designing PAs. Meanwhile, technology improvements pay the way toward developing appropriate process in the realm of cost, cut-off frequency, voltage breakdown, thermal and reliance features. Throughout this thesis, challenges in designing high power amplifiers in the pHEMT GaAs... 

Traditional multi-level SRAM-based cache hierarchies, especially in the context of chip multiprocessors (CMPs), present many challenges in area requirements, power consumption, and design complexity. STT-RAM has received increasing attention because of its attractive features:good scalability, zero standby power, non-volatility and radiation hardness. The use of STT-RAM technology in the last level on-chip caches has been proposed as it minimizes cache leakage power with technology scaling down. Furthermore, the cell area of STT-RAM is only 1/4 that of SRAM. This allows for a much larger cache with the same die footprint, improving overall system... 

Ionizing radiation can modify physical, chemical and biological properties of the irradiated materials. At present, the principal industrial applications of radiation are sterilization of health care products including pharmaceuticals, irradiation of food and agriculture products and materials modification. In the above application the wide range of the required doses together with different product densities require spatial mechanical design of the irradiators to be able to properly handle the specified tasks. In the multipurpose irradiators the design of system and positioning of the source must be done in such a way that a nearly optimum dose distaition in the product boxes in... 

From the programmer’s point of view, main memory allocation to a program is contigious, however this is non-contigious and the program is scattered in physical memory here and there. Assuming main memory partitioned into regions, each program accesses in its life time different regions which are not necessariliy close and occupy different percentages of the cache capacity. Considering what the replacement policy is chosen, the cache would be partitioned differently among regions, e.g., the commonly used LRU policy partitions the cache among regions on a demand basis, giving the more cache resource to regions whose miss ratio is higher, which is not necessarily optimal. In this thesis, we... 

Modern pipelined processors use a memory array named Branch Target Buffer (BTB) to reduce the performance penalty due to conditional braches by predicting path of the branch and keeping useful history-based information for future accesses. Today BTB is a fixed size and small memory array located near the processor. By the way, BTB, in the best case, should be large enough to accommodate all conditional branches throughout the running program. Moreover, small size BTB presents much fast access and is practical on-chip storage for a system with limited power budget.
Considering role in the memory hierarchy, on the other hand, the system performance is highly correlated to the L1 data cache... 

Portfolio is a collection of different stocks for investment. The investors' objectives in portfolio formation are to get the highest return against exposure to the lowest risk. Portfolio Optimization Problem is one of the most complicated problems in investment and finance. It may be simply explained as follows: Let's imagine a set of N stocks for selection. We would like to see what percentage of the total amount of investment should be dedicated to each stock to maximize portfolio's total return and minimize its total risk.
Portfolio Optimization Problem is a NP-Hard problem and generally there exists no polynomial-time deterministic algorithm to find a precise solution to such a... 

Long memory in assets return is important on the theoretical as well as the practical aspects and since it is a special form of nonlinear dynamics, in this study an ARFIMA model was used with the aim of considering the long memory in the return conditional average of automobile industry index. Then, due to the observation of ARCH effects, the simultaneous conditional average modeling and turbulences in the automotive industry index return using an ARFIMA-FIGARCH model was considered in the residuals of the best fitted model and results were that for modeling the returns and turbulences of automobile industry stocks which has a special long memory, FIGARCH will provide better and more... 

Switching as one of important characteristics of on-chip network affects on power consumption and performance. In general there are two switching methods as circuit-switching and packet-switching. Hybrid switching includes both switching to have both resource utilization and scalability of packet switching and low power consumption and improved latency of circuit switching. Also topology is another network attribute that greatly affects the power, performance, cost, and design time/effort of NoCs. In this thesis, we propose a novel NoC architecture which holds both fixed connections between adjacent nodes and long connections virtually connecting non-adjacent nodes. Our proposed NoC... 

Productivity is the effective usage of input or resources for production or output. Input (including Energy, raw materials, capital and work force), which is being used for output (including final products or services performed by an organization). Productivity, increases gross domestic product and competitiveness, and improves level of living. Firms and related management levels play the main role in improving productivity. Using productivity cycle management brings the productivity to improve as a permanent process, specifies the rout for productivity and prepares the ground. The most important step in productivity cycle (PDCA) is the measurement of productivity. In this research several... 

Storage is well-known as the performance bottleneck in I/O intensive programs such as online transaction processing applications; thus designing a cost-effective high performance disk subsystem is a major concern in enterprise applications. Data tiering is an efficient way to optimize cost, performance, and reliability in storage servers. With the promising advantages of Solid State Drives (SSDs) over Hard Disk Drives (HDDs) such as lower power consumption and higher performance , traditional data tiering techniques should be revisited in order to use SSDs in a more efficient way. This thesis presents a data tiering technique at the Operating System (OS) level to enhance system performance...