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Design and Evaluation of an NOC Supporting Simultaneous Execution of Multiple Applications
, M.Sc. Thesis Sharif University of Technology ; Sarbazi Azad, Hamid (Supervisor)
Abstract
In this project we present a method to support execution of multiple applications on an NoC simultaneously. To this end we are going to use resource sharing methods, especially Spacial Division Multiplexing (SDM). In this work we first present a mapping algorithm to map the nodes of a compound graph (a graph that is composed of all the task graphs that are supposed to work simultaneously) in to mesh nodes. We also present an architecture to support SDM. After that we present a routing and resource allocation algorithm to find a circuit for each communication flow in the task graph. Our results show that the proposed mapping algorithm reduces the average packet latency compared to NMAP...
Analysis, Evaluation and Improving the Performance and Power consumption of Mapping and Scheduling algorithms in Network on Chip
, M.Sc. Thesis Sharif University of Technology ; Vosoughi Vahdat, Bijan (Supervisor) ; Hessabi, Shaahin (Supervisor)
Abstract
According to Moor’s law, the number of transistors per chip would double every 1.5 years. It means that the number of processors, memory and hardware cores available on the chip also increases. In SoC, a number of IP cores and communication links or buses are integrated on a chip. According to inefficiency of the interconnection bus used in SoCs for a large number of processors, NoC has been introduced in the beginning of the current decade. In the NoC paradigm a router-based network is used for packet switched on-chip communication among cores. A typical NoC architecture will provide a scalable communication infrastructure for interconnecting cores. One of the most important features of...