Sharif Digital Repository

ADC is one of the key functional blocks of any mixed signal system and therefore must be optimally designed concerning power, performance, resolution and silicon area. Among different architectures have been employed up to now, successive approximation register ADCs are known as the ones with lower power, more simplicity and lower sampling rate. Benefiting from scaling down the CMOS technology results in higher sampling rate and lower power SAR ADCs replacing other types of ADCs. To achieve the desired ADC performance, efforts are usually focused on the improvement of circuit techniques as well as on the introduction of new or combinational architectures based on SAR ADCs. This thesis aims...