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    Design of a UWB Reconfigurable LNA with Variable Gain

    , M.Sc. Thesis Sharif University of Technology Sepidband, Paria (Author) ; Atarodi, Mojtaba (Supervisor) ; Fotowat Ahmady, Ali (Supervisor)
    Abstract
    In recent years, lots of efforts has been done to implement Ultra-Wideband (UWB) Low Noise Amplifiers (LNAs), and Reconfigurable Low Noise Amplifiers, to achieve low Noise Figure (NF) and power dissipation, and high gain and linearity. In this thesis an Ultra-Wideband CMOS Low Noise Amplifier is presented. Due to really low power consumption and extremely high data rates, the UWB standard is popular in the consumer market. The LNA is the outer most part of an UWB transceiver, which provides enough gain to the signal with the least possible noise and distortion. 0.18u CMOS technology has been chosen for the design of the LNA at the transistor level. Two different bandwidths in a single LNA... 

    Segmented Reconfigurable Bus for SoCs

    , M.Sc. Thesis Sharif University of Technology Shahidi, Narges (Author) ; Sarbazi Azad, Hamid (Supervisor)
    Abstract
    Advance in VLSI integration level has realized multi-core system-on-chip. For inter-IP communication on-chip network is proposed as a substitute for simple interconnects such as bus fabrics and expensive point-to-point links. Although onchip networks have some superiorities over simple interconnects, but they need more of real estate resource. Although buses are not scalable, they are still popular for their simple communication mechanism. There are so many proposed mechanisms to make buses more scalable and more popular. Most of them try to change bus structure by segmenting and using reconfigurable methods. In this thesis, we explore buses delay by considering the number of component in a... 

    Design and Implementation of a High-Radix FPGA-Based Packet Switch

    , M.Sc. Thesis Sharif University of Technology Abbasian, Alireza (Author) ; Pakravan, Mohammad Reza (Supervisor) ; Hadi, Mohammad (Supervisor)
    Abstract
    The rapid growth of the Internet, edge computing, and artificial intelligence has intensified the demand for high-capacity and flexible networks, where packet switches play a fundamental role. With the increasing hardware resources and transceiver bandwidths of modern FPGAs, implementing such switches on reconfigurable platforms has become not only feasible but also highly attractive, offering advantages such as reconfigurability, integration with other network functions, and eliminating the need for separate ASIC-based solutions. In this thesis, we present a scalable switch fabric architecture on FPGA, which on the VU13P device enables the implementation of a switch with up to 128 ports at...