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Design & Implementation of Frequency Synthesizer for Multi-Band Standard Transceivers

Torkzadeh, Pooya | 2011

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  1. Type of Document: Ph.D. Dissertation
  2. Language: Farsi
  3. Document No: 41883 (05)
  4. University: Sharif University of Technology
  5. Department: Electrical Engineering
  6. Advisor(s): Atarodi, Mojtaba
  7. Abstract:
  8. Nowadays, general electronic devices such as computers, notebooks, cellular phones and etc. are supporting Bluetooth, RFID and Zigbee standards. By integrating all of RF sections of mentioned standards, total power consumption, occupied area and total cost and price will be decreased. RF devices communications with maximum bandwidth and data rate with minimum power consumption are the main purposes in designing RF and digital building blocks. Bluetooth and Zigbee standards are applied for networking the desired RF devices. RFID standard is providing automatic identifications, item tracking and tracing, item management and inventory. RFID standard makes the communication between Tags and Readers and operates in VHF, UHF and S-Band. UHF based RFID standard has some advantages such as more data rate, operating in larger distance, smaller antenna, less cost and price, having ability of reading multi-tags in the same time versus other frequency bands. Frequency synthesizer is one of the most important blocks in RF transceivers which its designing consists of system design, analogue circuits with low noise design and digital high frequency circuits design.
    In this Ph.D. dissertation, a fractional frequency synthesizer supporting Bluetooth (S-Band), RFID (UHF) and Zigbee (S-Band) using 0.18μm CMOS technology has been designed and implemented. Existing strong blocker signals near desired signal frequency band decreases receiver sensitivity and imposing a strong phase noise requirement to frequency synthesizer. Implementing a frequency synthesizer with low phase noise in S-Band, producing quadrature signal for QPSK modulation (for Zigbee standard) with closed loop bandwidth of 500KHz for FSK modulation (Bluetooth standard) makes the synthesizer design mode severe and hard versus trasitional structures. On the other hand, while the synthesizer is applied in mobile and hand-held devices, the power consumption should be as low as possible which should be the main goal in parameters optimizations. Designed and implemented frequency synthesizer power consumption is as low as 37mW with total area of 1mm2 which are the main advantages versus existing architectures parameters.On the other hand, a Sigma-Delta modulator with novel architecture for increasing output SNDR and minimzing power consumption and a Quadrature-VCO (QVCO) generating quasi-square wave signal with minimum phase noise have been designed and fabricated too
  9. Keywords:
  10. Voltage Controlled Oscillator ; Fractional Frequency Synthesis ; Orthogonal Signal Generation ; Sigma-Delta Modulator with Novel Architecture ; Radio Frequency Identification (RFID)

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