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- Type of Document: M.Sc. Thesis
- Language: Farsi
- Document No: 42925 (05)
- University: Sharif University of Technology
- Department: Electrical Engineering
- Advisor(s): Fotowwat Ahmady, Ali
- Abstract:
- Global Positioning System (GPS) is one of the most widely-used systems nowadays. GPS receivers are frequently integrated along with other communication systems in hand-held devices like cellular phones, tablets and etc. Therefore, implementing receivers with low power consumption (for longer battery lives) and high sensitivity (in order to detect the weak GPS signal) has attracted the attention of many researchers. With the purpose of designing such a low-power and sensitive receiver, we have studied the recently proposed low-power schemes. We have proposed a new architecture for the QLMV Cell; the circuit in which main blocks associated with RF front-end are stacked on top of each other in order to share the same current. By employing current reuse technique, this circuit carries out amplification, downconversion and LO generation with the same current. The new topology, designed in TSMC 0.18 µm CMOS technology is simulated and compared with prior works. Other parts of the receiver chain including frequency synthesizer, complex filter and IF amplifiers are designed based on the proposed QLMV Cell as the RF front-end. In the end, we have proposed another architecture for the LMV Cell. This new structure, which we have named “1.5-stage Cell”, combines the benefits of multistage front-ends with the advantages of stacked topologies.
- Keywords:
- Global Position System (GPS) ; Frequency Synthesizer ; Complex Filter ; Phase Locked Loop (PLL) ; Low-Power Radio Receiver ; LMV (QLMV)Circuit ; Radio Frequency Front End Circuit
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