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Reconfigurable Architecture For Cryptanalysis Applications

Noshadravan, Mohammad Reza | 2012

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 43469 (19)
  4. University: Sharif University of Technology
  5. Department: Computer Engineering
  6. Advisor(s): Jahangir, Amir Hossein
  7. Abstract:
  8. Nowadays, the significance of securing data and information is undeniable. Cryptography is being used to provide data security. In addition, cryptanalysis is required to evaluate the effectiveness of cryptography methods, and hence, it is an essential concept for securing data. In general, the cryptography functions shall be designed in a way to impose a high load of time-intensive operations to prevent an adversary from accessing the main data from the encrypted data. As a result, cryptography and cryptanalysis algorithms need high performance computations. So far, a number of methods have been proposed to support the required performance. These methods include: distributed computing and parallel processing, exploiting particular processor units (such as GPUs and PS3 game console processors), and using reconfigurable devices (FPGAs) to design special purpose hardware. Among these methods, FPGAs, due to their flexibility and capability to provide a higher performance, seem more promising. One of the new features of the FPGAs, so-called run time reconfiguration, makes these devices highly flexible, and it also facilitates a higher performance in terms of the computation speed in some cases. In this thesis, by exploiting the mentioned feature, we propose a new architecture for smart brute force attacks. Our approach is applied on special cryptography systems which make use of passwordbased cryptography standard (PKCS#5). In this study, the proposed architecture is implemented and compared to a regular architecture (i.e. without using run time reconfiguration) on FPGA. The results illustrate that our method utilizes the FPGA resources more efficiently than the regular one, and consequently, this leads to speedup the process and also cost and energy savings. We also demonstrate that compared to CPU, using FPGA decreases the costs of finding a password through a cryptanalysis application. That is, using FPGAs is more cost benefitial than CPUs in analyzing and checking passwords.
  9. Keywords:
  10. Field Programmable Gate Array (FPGA) ; Cryptanalysis ; Brute Force Attack ; Reconfigurable Computing ; Run Time Reconfiguration ; Password-Based Cryptography Standard (PKCS

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