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System-Level Vulnerability Estimation For Components of Multiprocessor Systems

Saadat, Mohammad Hashem | 2013

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  1. Type of Document: M.Sc. Thesis
  2. Language: English
  3. Document No: 44310 (52)
  4. University: Information Technology Communication and Computer Networks
  5. Department: Science and Engineering
  6. Advisor(s): Gorshi, Alireza
  7. Abstract:
  8. Cache memory is one of the most important parts of the microprocessors. Caches improve performance by bringing data and instructions near the processors and decreasing the access time to data and instructions. But caches are also vulnerable to some kind of error called soft error. When an error happens in a cache, suddenly can propagate throughout the system and affect the integrity and reliability of the overall system. There are actually two types of errors in cache memories, permanent (hard) errors and transient (soft) errors. Previous studies have shown that about 92% of system reboots are initiated by soft-error occurring in cache memory. Soft-errors have two main sources, alpha particles and neutrons. By increasing the number of processors used in multiprocessor systems, the soft error rate is expected to increase. Therefore, designers would need to implement error protection techniques in future microprocessor designs. Developing accurate System-Level error vulnerability models for individual components used in multiprocessors is an important part of designing cost-effective protection techniques. This model can help designers estimate System-Level vulnerability for data-path components such as cache, register files, and load/store queues before developing protection techniques. Preparing a perfect model for each component would facilitate making knowledgeable decisions about the level of protection needed for that processor component. The correct protection level for data-path structures would enhance system reliability by reducing data loss probability. In this study we focus on how the soft error occurrences in cache memories impacts on the Microprocessor reliability, which can in turn affect the consistency of the entire Microprocessor. We do this by using a methodology called System-level Vulnerability Factor (SVF). The SVF is the result of overlooking read frequency and component error masking in Architectural Vulnerability Factor (AVF). The SVF is the percentage of errors that occur in a component and propagate to system outputs
  9. Keywords:
  10. Soft Error ; Multiprocessor System ; Cache Memory ; Cuche Memory Vulnerability ; Vulnerability Estimation

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