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Supporting non-contiguous processor allocation in mesh-based CMPs using virtual point-to-point links

Asadinia, M ; Sharif University of Technology

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  1. Type of Document: Article
  2. Abstract:
  3. In this paper, we propose a processor allocation mechanism for run-time assignment of a set of communicating tasks of input applications onto the processing nodes of a Chip Multiprocessor (CMP), when the arrival order and execution lifetime of the input applications are not known a priori. This mechanism targets the on-chip communication and aims to reduce the power and latency of the NoC employed as the communication infrastructure. In this work, we benefit from the advantages of non-contiguous processor allocation mechanisms, by allowing the tasks of the input application mapped onto disjoint regions (sub-meshes) and then virtually connecting them by bypassing the router pipeline stages of the inter-region routers. The experimental results show considerable improvement over one of the best existing allocation mechanisms
  4. Keywords:
  5. Contiguous allocation ; Network-on-Chip ; processor allocation ; Chip Multiprocessor ; Non-contiguous allocation ; Performance ; Power consumption ; Microprocessor chips ; Routers ; Systems analysis ; VLSI circuits ; Pipeline processing systems
  6. Source: Proceedings -Design, Automation and Test in Europe, DATE ; 2011 , p. 413-418 ; ISSN: 15301591 ; ISBN: 9783981080179
  7. URL: http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=5763072&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D5763072