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Implementation of heart rate variability signal processing into FPGA: System on-chip design

Rezaei, S ; Sharif University of Technology | 2013

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  1. Type of Document: Article
  2. Publisher: 2013
  3. Abstract:
  4. In this paper, we try to develop and implement the HRV signal processing into a Field Programmable Gate Array (FPGA) for extracting this signals feature
  5. Keywords:
  7. Source: Computing in Cardiology, Zaragoza, Spain ; Volume 40 , Sept , 2013 , Pages 397-400 ; 23258861 (ISSN); 9781479908844 (ISBN)
  8. URL: http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=6713397&url=http%3A%2F%2Fieeexplore.ieee.org%2Fiel7%2F6695807%2F6712387%2F06713397.pdf%3Farnumber%3D6713397