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- Type of Document: M.Sc. Thesis
- Language: Farsi
- Document No: 48463 (05)
- University: Sharif University of Technology
- Department: Electrical Engineering
- Advisor(s): Shabany, Mahdi
- Abstract:
- After being introduced in 2009, the first fully homomorphic encryption (FHE) scheme has created significant excitement in academia and industry. Despite rapid advances in the last 6 years, FHE schemes are still not ready for deployment due to an efficiency bottleneck. Here we introduce a hardware/software codesign, in fact a hardware accelerator optimized for a class of reconfigurable logic to bring homomorphic encryption schemes one step closer to deployment in real-life applications. The accelerator we present is connected via a fast PCIe interface to a CPU platform to provide homomorphic evaluation services to any application that needs to support blinde computations. Specifically we introduce a number theoretical transform based multiplier architecture capable of efficiently handling very large polynomials
- Keywords:
- Hardware-Software Co-Design ; Modular Multiplier ; Fully Homomorphic Encryption ; BGV Algorithm ; Polynomial Modular Multiplier
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