Loading...

A hybrid Non-Volatile Cache Design for Solid-State Drives using comprehensive I/O characterization

Tarihi, M ; Sharif University of Technology

526 Viewed
  1. Type of Document: Article
  2. DOI: 10.1109/TC.2015.2455978
  3. Publisher: IEEE Computer Society
  4. Abstract:
  5. The emergence of new memory technologies provides us with opportunity to enhance the properties of existing memory architectures. One such technology is Phase Change Memory (PCM) which boasts superior scalability, power savings, non-volatility, and a performance competitive to Dynamic Random Access Memory (DRAM). In this paper, we propose a write buffer architecture for Solid-State Drives (SSDs) which attempts to exploit PCM as a DRAM alternative while alleviating its issues such as long write latency, high write energy, and finite endurance. To this end and based on thorough I/O characterization of desktop and enterprise applications, we propose a hybrid DRAM-PCM SSD cache design with an intelligent data movement scheme. This architecture manages to improve energy efficiency while enhancing performance and endurance. To study the design trade-offs between energy, performance, and endurance, we augmented Microsoft's DiskSim SSD model with a detailed hybrid cache using PCM and DRAM parameters from a rigorous survey of device prototypes. We study the design choices of implementing different PCM and DRAM arrays to achieve the best trade-off between energy and performance. The results display up to 77 percent power savings compared to a DRAM cache and up to percent reduction in request response time for a variety of workloads, while greatly improving disk endurance
  6. Keywords:
  7. Phase change RAM ; SSD cache ; Cache memory ; Design ; Digital storage ; Economic and social effects ; Energy efficiency ; Integrated circuit design ; Memory architecture ; Random access storage ; Buffer architecture ; Dynamic random access memory ; Enterprise applications ; Hybrid memory ; Phase change memory (pcm) ; Solid state drives ; Dynamic random access storage
  8. Source: IEEE Transactions on Computers ; Volume 65, Issue 6 , 2016 , Pages 1678-1691 ; 00189340 (ISSN)
  9. URL: http://ieeexplore.ieee.org/document/7155523