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Improving Manufacturing Yield and Life Cycle of Special Purpose SIMT Processors for Inexact Computing

Afarin, Mahbod | 2017

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 50444 (19)
  4. University: Sharif University of Technology
  5. Department: Computer Engineering
  6. Advisor(s): Hesabi, Shahin
  7. Abstract:
  8. The downscaling of feature size and higher process variation in COMS nano-technology are anticipated to introduce higher manufacturing anomalies. On the other hand, designs are getting more complicated due to more innovative applications where they need higher numbers of transistors. Because of these issues, integrated circuits manufacturing has become more complicated than before. Complexity in manufacturing process increases the probability of the defects in chips. This phenomenon reduces the fabrication yield. Conventional methods like fault tolerant techniques, defect tolerant techniques and redundancy are not separately good enough for improving manufacturing yield. On the other hand, the profitability of integrated circuits manufacturing depends on the fabrication yield. Thus, we should find a proper solution to improve the fabrication yield. Approximate computing is a novel method for improving the fabrication yield. For error tolerant applications – images, videos, audios, graphics, and games – it is known that error at outputs are tolerable provided that severities are within application-specific thresholds; therefore, we can use erroneous chips without using redundancy. With this technique, we can reach a dramatic increase in chips’ yield without using redundancy. SIMT processors are a suitable subject for approximate computing. In this thesis, first, we show that Radeon HD 7970 can tolerate error in its lanes for many benchmarks. Then, we will do the same experiment for sub-lane simulation. Finally, we will attain yield and cost improvements for some SIMT processors. On average, we contribute to 0.05, 0.11 and 0.17 percent improvement in manufacturing yield for SIMT processors which can tolerate 1, 2 and 3 Lanes, respectively. So, if a specific fab builds 10,000 SIMT processors daily, on average, we can save 2, 4 and 6 million dollars per year for SIMT processor which can tolerate 1, 2 and 3 Lanes, respectively. In another phase of this thesis, we introduce low area redundancy for special purpose SIMT processors. By finding the critical instructions for each benchmark, we can use a redundant lane which provides just these critical instructions. So, we can use these redundant thin cores in the SIMT processor. With this technique, we can achieve 0.03 percent improvement in fabrication yield and save 6 million dollars per year
  9. Keywords:
  10. Single Instruction Multiple Thread (SMIT)Processors ; Fault Tolerance ; Approximate Computing ; Manufacturing Cost ; Manufacturing Yield

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