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A Power Efficient Routing Architecture for Reconfigurable Device

Zandieh, Mohsen | 2018

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 52197 (19)
  4. University: Sharif University of Technology
  5. Department: Computer Engineering
  6. Advisor(s): Asadi, Hossein
  7. Abstract:
  8. FPGA is a suitable substrate for implementation of embedded systems, mobiles, and hand-held devices due to cost reduction for \emph{Non-Recurring Engineering (NRE)}, short time to market, design flexibility, and reprogramming capability. Significant downscaling of CMOS technology feature size has led to static power growth rate, which is a limiting factor in further scaling. Previous studies aimed at reducing power consumption, mainly have focused on the power consumption of logical resources. However, proposing a low power architecture in routing network affects the power consumption of FPGAs significantly, because of the dominant power consumption in the routing network. This thesis proposes a power efficient routing architecture for reconfigurable devices by eliminating the routing resources abundance. In order to achieve this aim, at first, we investigate the routing resources utilization rate which demonstrates a huge number of resources are unused or rarely used. Investigation of the multiplexer utilization patterns has motivated us to propose an algorithm in order to replace 12:1 multiplexers with 4:1 and 8:1 multiplexers. In the proposed architecture the size of multiplexers is decreased, from 12 to 8 and then from 12 to 4. Results of the MCNC benchmark show that \emph{Power Delay Product (PDP)} is reduced by 20.12\% for 8:1 multiplexers and 14.27\% for 4:1 multiplexers. Furthermore, investigating the VTR benchmark shows that the proposed architecture reduces PDP by 30.04\% and 26.9\% with 8:1 and 4:1 multiplexers, respectively. However, increasing channel width by 6.1\% (for 8:1 multiplexers) and 26.3\% (for 4:1 multiplexers) results in FPGA flexibility reduction
  9. Keywords:
  10. Field Programmable Gate Array (FPGA) ; Reconfigurable Devices ; Power Consumption ; Embedded System ; Routing ; Versatile Placement and Routing (VPR)Tools

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