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Multi-objective genetic optimized multiprocessor SoC design

Arjomand, M ; Sharif University of Technology | 2008

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  1. Type of Document: Article
  2. DOI: 10.1109/ISSOC.2008.4694887
  3. Publisher: 2008
  4. Abstract:
  5. In this paper, we introduce a new Multi-Objective Genetic Algorithm (MOGA) for mapping a given set of intellectual property onto a Network-on-Chip architecture such that for a specific application total communication cost and energy consumption become optimized while bandwidth constraints are satisfied. As the main theoretical contribution, we first introduce a generic queuing model to estimate performance and an experimental energy consumption model during the design phase, with acceptable accuracy. Then, an efficient genetic algorithm employs these models to propose a Pareto optimal front for an application and an arbitrary topology. Experimental results show that the proposed algorithm is very fast which results in a new approach for mapping MPSoC cores on chip. © 2008 IEEE
  6. Keywords:
  7. Arbitrary topology ; Bandwidth constraint ; Communication cost ; Design phase ; Efficient genetic algorithms ; Energy consumption ; Energy consumption model ; Multi objective ; Multi-objective genetic algorithm ; Multi-processor SoC ; Network-on-chip architectures ; New approaches ; On chips ; Pareto-optimal front ; Queuing models ; Application specific integrated circuits ; Electric network topology ; Microprocessor chips ; Multiobjective optimization ; Programmable logic controllers ; Telecommunication systems ; Electric load forecasting
  8. Source: 2008 International Symposium on System-on-Chip, SOC 2008, Tampere, 5 November 2008 through 6 November 2008 ; December , 2008 ; 9781424425419 (ISBN)
  9. URL: https://ieeexplore.ieee.org/document/4694887