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Implementation of a jpeg object-oriented ASIP: A case study on a system-level design methodology

Mohammadzadeh, N ; Sharif University of Technology | 2007

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  1. Type of Document: Article
  2. DOI: 10.1145/1228784.1228864
  3. Publisher: 2007
  4. Abstract:
  5. In this paper, we present a JPEG decoder implemented in our ODYSSEY design methodology. We start with an object-oriented JPEG decoder model. The total operation from modeling to implementation is done automatically by our EDA tool-set in about 10 hours. The resultant system is a JPEG decoder ASIP whose hardware part is implemented on FPGA logic blocks and software part runs on a MicroBlaze processor. This ASIP can be extended by software routines to implement the motion JPEG or MPEG2 decoding algorithms. We implemented our system on ML402 FPGA-based prototype board. Experimental results show that our ASIP implementation is comparable to other approaches while our approach enables quick and easy development of an ASIP using our EDA tool-set and effectively reduces time-to-market. Copyright 2007 ACM
  6. Keywords:
  7. Algorithms ; Automatic programming ; Computer aided software engineering ; Data structures ; Decoding ; Embedded systems ; Program processors ; Decoding algorithms ; JPEG decoders ; Logic blocks ; System-level designs ; Object oriented programming
  8. Source: 17th Great Lakes Symposium on VLSI, GLSVLSI'07, Stresa-Lago Maggiore, 11 March 2007 through 13 March 2007 ; 2007 , Pages 329-334 ; 159593605X (ISBN); 9781595936059 (ISBN)
  9. URL: https://dl.acm.org/doi/10.1145/1228784.1228864