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Design and Implementation of Low-Speed Controller Area Network (CAN) Transceiver in High Voltage BCD 0.18μm Process

Gholizadeh Pasha, Zeynab | 2021

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 54466 (05)
  4. University: Sharif University of Technology
  5. Department: Electrical Engineering
  6. Advisor(s): Medi, Ali
  7. Abstract:
  8. In this thesis, a Fault-Tolerant Low-Speed Controller Area Network (CAN) transceiver chip has been designed and implemented in High Voltage BCD 0.18um technology. The designed transceiver is compliant to ISO 11898 functional standard, TJA1055 datasheet as a reference chip, as well as the standards related to Electro-Magnetic Compatibility (EMC). Its failure management capability is completely based on the measurement results of the reference chip. All the characteristics of the designed transceiver, after two constructions, were measured using three types of test boards, in addition to room temperature in chambers with temperatures of -40 °C and 125 °C.This transceiver has a normal mode and four low-power modes. In normal mode, the chip is in its differential operating mode as long as there is no failure in the buses; This means that the transmitter path of the two buses is active and at the same time, the differential receiver converts the differential signal of the bus into a suitable signal for the digital control unit and finally the RXD pin. In this case, due to receiving the differential signal of the buses as the input of the receiver, the transceiver has high performance in terms of noise resistance, ground shift and Electro-Magnetic Immunity (EMI), and also due to speed control of turning output transistors on and off in transmitter block and compensating the difference in the nature of output transistors in this block, the changes of the common mode bus voltage over time, and thus the transceiver Electro-Magnetic Emission (EME) have their lowest value. But as soon as a fault occurs in one of the buses, the chip leaves its differential operating mode and enters the single-wire operating mode through the digital control unit; The corresponding bus transmitter path is deactivated and the output of the other bus single-ended receiver is transmitted to the RXD pin. As a result, despite the failure of one of the buses, the data on TXD pin of the transmitter node is still transmitted to the RXD pin of the active nodes. It is the EMC considerations in the single-wire mode that limit the baud rate of such a transceiver to 125 kbit/s. In normal operating mode, by embedding suitable elements in transmitter block, the leakage current of the buses is reduced under high temperature conditions and so the input resistance of the buses in these conditions is in the range.In low-power modes, the transmitters and receivers of normal mode are inactive, and only the bus wake-up receivers, using a few microamperes of current, monitor CANH and CANL buses to receive the remote wake-up pattern through one of them and wakes the transceiver up to normal mode via microcontroller, whenever it detects the defined pattern on the bus. Designed transceiver, in addition to normal mode, is able to manage bus failures in low-power modes via two wake-up receivers
  9. Keywords:
  10. Electromagnetic Compatibilty (EMC) ; ISO 11898 Standard ; Analog Front End (AFE)Cheap ; Controller Area Network (CAN) ; Fault-Tolerant Low-Speed Controller Area Network (CAN) ; Single-Wire Operating Mode ; Differential Operating Mode ; Low-Power Modes

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