Loading...

Design and Implementation of Random Verification Methods for Microcontroller SPI, UART and CRC Peripherals in ASIC Design

Saati, Mohammad | 2025

0 Viewed
  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 58270 (05)
  4. University: Sharif University of Technology
  5. Department: Electrical Engineering
  6. Advisor(s): Medi, Ali
  7. Abstract:
  8. In today's world, electronic equipment is widely used across all industries, both large and small. Electronic circuits can be assembled alongside each other to serve specific purposes. With rapid advancements in the electronics industry and the growing demand for higher performance in smaller areas, integrated circuits (ICs) were developed. Over time, technological progress made it possible to integrate an increasing number of transistors within a fixed area, leading to the development of Application-Specific Integrated Circuits (ASICs). ASIC chips can accommodate a substantial number of transistors and, consequently, a large number of logic gates. This capability facilitated the creation of microcontrollers and microprocessors capable of performing complex and intensive computations. Given the rising need for fast-response control systems across various industries and applications, ASIC-based microcontrollers have become increasingly popular. ASIC design is typically divided into two main stages: Front-End and Back-End design. The Front-End stage involves designing circuits using hardware description languages (HDLs). In addition to design, this stage requires verifying the correctness of the described hardware functionality—a process known as verification. The Back-End stage focuses on layout design and addresses critical factors such as power consumption, maximum operating frequency, heat dissipation, and more. It involves arranging the components and modules described in the Front-End phase using HDL to achieve optimal performance. This thesis presents an example of verification for a cache memory module in the Front-End design phase. It also explains the concept of verification using the shadow model. Furthermore, it outlines a complete placement workflow for a microcontroller, addressing key considerations such as path delays, power consumption, and related factors. Finally, the designed microcontroller, implemented using 180nm CMOS technology, is evaluated, and the measured results are compared with simulation outcomes
  9. Keywords:
  10. Microcontroller ; Application Specific Integrated Circuit (ASIC) ; Verification ; Shadow Model

 Digital Object List

 Bookmark

...see more