Sharif Digital Repository

In this paper, we propose a new 6-round Related-Key Impossible Differential property of AES-256 and two related-key impossible differential attacks on 7 and 9 round AES-256, based on the proposed property. The overall complexity of the proposed 7 round attack is decreased by the factor 217. This is for the first time that a Related-Key Impossible Differential attack on 9-round AES-256 is successful. Also this is the first related-key attack on 9-round AES-256 that needs only 2 keys. Although the data and time complexities of the attack are approximately code book and exhaustive search, but we think the proposed property will be useful in future research like boomerang and rectangle attacks  

Calcium is a highly widespread and versatile intracellular ion that can control a wide range of temporal dynamics in the brain such as synaptic plasticity. This brief presents a novel and efficient digital circuit for implementing a calcium-based plasticity model aimed at reproducing relevant biological dynamics. Accordingly, we investigate the feasibility of the proposed model in a minimal neural network stressing on the effect of calcium oscillations on synaptic plasticity with various neuronal stimulation protocols. MATLAB simulations and physical implementations on field-programmable gate array confirm that the proposed model, with considerably low hardware overhead, can fairly mimic the... 

Simulation of large-scale nonlinear dynamical systems on hardware with a high resemblance to their mathematical equivalents has been always a challenge in engineering. This paper presents a novel current-input current-output circuit supporting a systematic synthesis procedure of log-domain circuits capable of computing bilateral dynamical systems with considerably low power consumption and acceptable precision. Here, the application of the method is demonstrated by synthesizing four different case studies: 1) a relatively complex 2-D nonlinear neuron model; 2) a chaotic 3-D nonlinear dynamical system Lorenz attractor having arbitrary solutions for certain parameters; 3) a 2-D nonlinear Hopf... 

There are several key challenges in performing cache-based attacks on ARM-based devices. Lipp et al. introduced various techniques to tackle these challenges and applied successfully different cache-based attacks on ARM-based mobile devices. In the cache-based attacks proposed by Lipp et al. it is assumed that the attacker has access to the mapping of virtual addresses to physical addresses through/proc/self/pagemap which is an important limiting factor in Linux and newer versions of Android operating systems. To access this mapping, the attacker must know the root of the operating system. In this paper, we introduce an Evict+Reload attack on the T-table-based implementation of AES which... 

CPU caches are powerful sources of information leakage. To develop practical cache-based attacks, the need for automation of the process of finding exploitable cachebased side-channels in computer systems is felt more than ever. Cache template attack is a generic technique that utilizes Flush+Reload attack in order to automatically exploit cache vulnerability of Intel platforms. Cache template attack on the T-table-based AES implementation consists of two phases including the profiling phase and key exploitation phase. Profiling is a preprocessing phase to monitor dependencies between the secret key and behavior of the cache memory. In addition, the addresses of T-tables can be obtained... 

This study proposes a spiking neuro-fuzzy clustering system based on a novel spike encoding scheme and a compatible learning algorithm. In this system, we utilize an analog to binary encoding scheme that properly maps the concept of "distance" in multi-dimensional analog spaces to the concept of "dissimilarity " of binary bits in the equivalent binary spaces. When this scheme is combined with a novel binary to spike encoding scheme and a proper learning algorithm is applied, a powerful clustering algorithm is produced. This algorithm creates flexible fuzzy clusters in its analog input space and modifies their shapes to different convex shapes during the learning process. This system has... 

Process variation has an increasingly dramatic effect on delay and power as process geometries shrink. Even if the amount of variation remains the same as in previous generations, it accounts for a greater percentage of process geometries as they get smaller. So an accurate prediction of path delay and power variability for real digital circuits in the current technologies is very important; however, its main drawback is the high runtime cost. In this paper, we present a new fast EDA tool which accelerates Monte Carlo based statistical static timing analysis (SSTA) for complex digital circuit. Parallel platforms like Message Passing Interface and POSIX® Threads and also the GPU-based CUDA... 

Memristive devices have gained significant research attention lately because of their unique properties and wide application spectrum. In particular, memristor-based resistive random access memory (RRAM) offers the high density, low power, and low volatility required for next-generation nonvolatile memory. Nowadays, despite significant advances in hardware technology, in the case of massively parallel systems still new computational architectures are required. Simulation of large quantity of memristors in the crossbar structure is a known challenge encountering these barriers. Using graphic processing units (GPU) as a low-cost and high-performance computing platform is an efficient preferred... 

This paper presents a digital hardware implementation of a frequency adaptive Hopf oscillator along with investigation on systematic behavior when they are coupled in a population. The mathematical models of the oscillator are introduced and compared in sense of dynamical behavior by using system-level simulations based on which a piecewise-linear model is developed. It is shown that the model is capable to be implemented digitally with high efficiency. Behavior of the oscillators in different network structures to be used for dynamic Fourier analysis is studied and a structure with more precise operation which is also more efficient for FPGA-based implementation is implemented. Conceptual... 

This study presents a cellular-based mapping for a special class of dynamical systems for embedding neuron models, by exploiting an efficient memristor crossbar-based circuit for its implementation. The resultant reconfigurable memristive dynamical circuit exhibits various bifurcation phenomena, and responses that are characteristic of dynamical systems. High programmability of the circuit enables it to be applied to real-time applications, learning systems, and analytically indescribable dynamical systems. Moreover, its efficient implementation platform makes it an appropriate choice for on-chip applications and prostheses. We apply this method to the Izhikevich, and FitzHugh-Nagumo neuron... 

Microarchitectural attacks utilize the performance optimization constructs that have been studied over decades in computer architecture research and show the vulnerability of such optimizations in a realistic framework. One such highly performance driven vulnerable construct is speculative execution. In this paper, we focus on the problem of breaking the kernel address-space layout randomization (KASLR) on modern mobile devices without using cache memory as a medium of observation. However, there are some challenges to breaking KASLR on ARM CPUs. The first challenge is that eviction strategies on ARM CPUs are slow, and the microarchitectural attacks exploiting the cache as a covert channel...