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A non-linear neural D/A converter for direct digital frequency synthesizers
, Article International Joint Conference on Neural Networks 2006, IJCNN '06, Vancouver, BC, 16 July 2006 through 21 July 2006 ; 2006 , Pages 2669-2672 ; 10987576 (ISSN); 0780394909 (ISBN); 9780780394902 (ISBN) ; Sedighi, B ; Sharif University of Technology
Institute of Electrical and Electronics Engineers Inc
2006
Abstract
In this paper, a new non-linear D/A converter (DAC) is presented. This D/A converter uses neural network to approximate a sine function. It is targeted for direct digital frequency synthesizers in which the phase to sine amplitude conversion is usually performed using a ROM. Utilizing the proposed DAC, the power hungry ROM is removed. A design example is presented and the performance of the DAC is compared to the conventional method. The impact of non-idealities on the performance of the system is also investigated. © 2006 IEEE
Design of Low Phase Noise DCO in All Digital Frequency Synthesizers
, M.Sc. Thesis Sharif University of Technology ; Atarodi, Mojtaba (Supervisor)
Abstract
A new class of design has been introduced in the RF circuits and Frequency Synthesizers, which is based on the digital circuits. Implementation of the digital synthesizers suppresses the need to use loop filter and thus reduces the loop lock time. In this thesis different topologies of digitally controlled oscillators using inductor and capacitor tank and all digital architectures used in high frequency all digital synthesizers in 0.18um CMOS technology has been inspected and simulated. Novel techniques introduced to improve the ring oscillator-based design’s specifications which doesn’t need inductor. Using the introduced techniques, the phase noise has been lessened acceptably with respect...
Design and Simulation of Phase Detector and Other Digital Circuits of an All Digital Frequency Synthesizer to Decrease Phase Noise and Lock Time
, M.Sc. Thesis Sharif University of Technology ; Atarodi, Mojtaba (Supervisor)
Abstract
In this thesis, An All Digital Frequency Synthesizer for use in RF applications is designed in 180nm CMOS. Different blocks such as Phase detector, Loop filter and Loop counter is designed. Finally, an All Digital Frequency Synthesizer is modeled using this circuits and an Digitally controlled oscillator model and is designed for GSM. In this thesis a new method is proposed to noise shape the quantization noise of the time to digital converter. The Time to Digital Converter has 7mW power consumption for 0ns to 1ns input range. Using this noise shaping method, quantization noise is reduced about 20dB. Also, limit cycle related spurs is reduced significantly using first order and second order...