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Improving Performance and Power Consumption of Optical CMPs Using Inter-core Communication Prediction

Ghane, Millad | 2011

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 42124 (19)
  4. University: Sharif University of Technology
  5. Department: Computer Engineering
  6. Advisor(s): Sarbazi Azad, Hamid
  7. Abstract:
  8. Studying data flows in conventional applications of Multi-Processor System-on-Chips (MPSoCs) denotes that most of these flows are the ones that transfer huge volume of data in inter-core communications. Previous works try to present architecture for interconnection network which some paths with low power and latency are reserved (statically or dynamically). However all of the presented methods are based on subnetworks or mechanism of transferring control messages (to establish a path and tear it down after transmission of data). Optical connections with low cost, low power and high bandwidth are good candidates to reduce power consumption of Network-on-Chips (NoCs). Therefore, using optical interconnects in MPSoCs to reduce power consumption is the best option. Usually, it is assumed that the interconnection structure is consists of an electrical network for small flows and an optical network for dominant flows. To minimize optical path setup latency and electrical network packets latency, we have assumed a switch-based interconnection network and a self-routing algorithm to route packets. Using prediction methods in cores, by processing data flows in a time interval, dominant flows could be predicted and then optic circuit is built before starting transmission. This approach shows good performance compared to the previous works using optical interconnections. Two methods for prediction are presented. The former one is based on sampling theory. By few sampling from data, the dominant flows are recognized. The latter one is based on machine learning methods. Using reinforcement learning in cores, the cores could identify dominant flows and follow behavior of the flows. By monitoring all of flows in a time interval, dominant flows of next interval are predicted. In addition to prediction methods, a hybrid architecture based on Multistage Interconnection Networks (MIN) with Omega topology is also introduced. For evaluation, the “booksim” simulator is used. For real traces (SPLASH-2), in comparison with electrical network and no prediction, power consumption and average message latency (AML) are measured. The first method improved power consumption and AML %50.37 and %52.58, and the second method, %60.58 and %62.95, respectively.
  9. Keywords:
  10. Network-on-Chip (NOC) ; Multi-Processor System on Chip Architecture ; Transmission Prediction ; Data Flow Prediction ; Multistage Interconnection Network (MIN) ; Optical Communication Network-on-Chips

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