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A Communication Model between SIMT Cores for Improving GPU Performance

Keshtegar, Mohammad Mahdi | 2013

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 44921 (19)
  4. University: Sharif University of Technology
  5. Department: Computer Engineering
  6. Advisor(s): Hesabi, Shahin
  7. Abstract:
  8. In recent years, GPUs are becoming an ideal candidate for processing a variety of high performance applications. By relying on thousands concurrent threads in applications and the computational power of large numbers of computing units; GPGPUs have provided high performance and throughput. To achieve the potential computational power of GPGPUs in broader kinds of applications, we need to apply some modifications in their architecture. In the baseline architecture, the maximum part of chip area is devoted to SIMT cores which their communication is handled through an interconnection network and a slow off-chip memory. Recent research shows that out of many types of miss events the last level cache misses that are followed by accesses to the slow main memory harm power and performance significantly. In this research, weintroduce a light overhead mechanism to reduce off chip memory requests which are triggering by on chip memory miss events. To do so, we propose a cluster based architecture to capture the similarity of memory requests between different SIMT cores and provide data for missed requests by adjacent cores. This light overhead mechanism improves performance up to 22% and reduces rate of stalled warps up to 80%
  9. Keywords:
  10. Graphic Processing ; Cache Memory ; Performance ; Power Consumption ; Interconnect Network

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