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Mapping and Scheduling Applications onto Multi-Core Chip-Multiprocessors in Dark-Silicon Era

Hoveida, Mohaddeseh | 2014

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 46562 (19)
  4. University: Sharif University of Technology
  5. Department: Computer Engineering
  6. Advisor(s): Sarbazi Azad, Hamid
  7. Abstract:
  8. Growing transistor counts, limited power budgets, and the breakdown of voltage scaling are currently conspiring to create a utilization wall that limits the fraction of a chip that can run at full speed at one time. This concept is the basis of the Dark Silicon definition. To address this issue, it is needed a structure to guaranty Limited power budget and obtain sufficient flexibility and performance for different applications with variety communication needs. Regarding to this structure, our aim is to present a platform for Networks-on-Chip that uses clustering and resource sharing among cores. Moreover, as task mapping on processing elements in NOCs is one of the most effective way to optimize NoC’s parameters, by changing router micro architecture and because of the reason that some cores can use other useless resources, our goal is achievable. On the other hand, existence of a mechanism that can execute on our proposed platform relies on improving performance and power consumption. So, in this thesis, we present two task mapping methods on our proposed platform. In this line, from power consumption and average execution time reduction points of view, our proposed methods outperform baseline and our results reveal that first and second algorithms can reduce average execution time by up to 29% and 41%, respectively. Furthermore, by using these methods power consumption can improve by up to 10% and 2%, respectively
  9. Keywords:
  10. Task Mapping ; Resource Sharing ; Network-on-Chip (NOC) ; Dark Silicon

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