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Evaluating Energy Efficiency and Scalability of Timing Channel- protection Techniques exploited Exploited for Single Chip Cloud Computer

Asgharzadeh Donighi, Ashkan | 2017

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 49423 (19)
  4. University: Sharif University of Technology
  5. Department: Computer Engineering
  6. Advisor(s): Hesabi, Shahin
  7. Abstract:
  8. Although cloud porcessors have lots of benefits, they have brought new challenges for designers; one of these issues, is information leakage through Timing Channel Attack in shared hardware resources. Among these shared resources, main memory controller is less understood. Also applying timing channel protection technquies to shared memory controller, in comparison with other parts such as NoC, caches, etc, can impose high performance overhead to system throughput. Temporal Partitioning (TP) is the baseline secure scheduling algorithm that was proposed for cope with timing channel attack in shared memory controller; but beside this protection, TP compels high performance degradation. In this project we attempted by calssifying applications according to their type of concern, and omitting performance-overhead causing elements, improve system throughput such that security of sytem is not threatened. By using our proposed efficicient timing channel resistant memory controller, performance overhead of system, in a cluster of cloud processor including 6 cores, in average, is reduced 15.83% compared with TP
  9. Keywords:
  10. Hardware Secunity ; Power Consumption ; Scalability ; Cloud Processors ; Timing Channel Attack ; Shared Memory Controller ; Security-Domains Temporal Partitioning ; Security-Domains Spatial Partitioning ; Security-Domains Scheduling

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