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A low-power temperature-compensated CMOS peaking current reference in subthreshold region

Eslampanah, M. S ; Sharif University of Technology

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  1. Type of Document: Article
  2. DOI: 10.1109/ISCAS.2017.8050744
  3. Abstract:
  4. In this paper, a new method to achieve very small current reference levels on integrated circuits with immunity to temperature variations using peaking current source with MOSFETs operating in subthreshold region is proposed. By adding a source degeneration resistor to the conventional peaking current source architecture, a zero temperature coefficient current can be generated. The proposed low-power circuit operating in the weak inversion region is designed, simulated, and fabricated in a 0.18-μm standard CMOS process. Measurement results verify the circuit operation with about 5% variation over the span of -40° C to +100° C (industrial temperature grade). The supplied current is designed to be 1.5μA. © 2017 IEEE
  5. Keywords:
  6. Current source ; Peaking current source ; CMOS integrated circuits ; Temperature ; Temperature distribution ; Current sources ; Source degeneration resistors ; Standard CMOS process ; Sub-threshold regions ; Temperature compensated ; Temperature compensation ; Weak inversion region ; Zero temperature coefficients ; Low power electronics
  7. Source: Proceedings - IEEE International Symposium on Circuits and Systems, 28 May 2017 through 31 May 2017 ; 2017 ; 02714310 (ISSN) ; 9781467368520 (ISBN)
  8. URL: https://ieeexplore.ieee.org/document/8050744