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Design of 8 kV ESD Protection Circuit Compatibe with HBM in BCD Technology

Jarollahi, Bahar | 2018

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 51276 (05)
  4. University: Sharif University of Technology
  5. Department: Electrical Engineering
  6. Advisor(s): Faez, Rahim; Medi, Ali
  7. Abstract:
  8. Electro Static discharge (ESD) in ICs can damage them. To prevent ICs from being damaged by ESD, protection circuits must be used. These protection circuits can be either designed on chip or on PCBs, to be more protective, both can be used. In this thesis, 8 kV ESD protection circuits according to human body model (HBM) in high voltage 0.18 um CMOS technology has been designed. In this thesis, in addition to study of electro static discharge phenomenon and its protection circuits, we have designed high voltage pads which are protected against 8 kV electro static discharge according to human body model. Finally these pads have been used in automotive ICs. In this thesis, firs we have studied electro static discharge and its protection circuits, then we have simulated MOSFETs with silvaco to study their behavior during electro static discharge. After that, we have simulated protection circuits and studied stability and false triggering in them. In addition to these circuits, we have designed high voltage pads with our process devices and then their layouts have been drawn according to the padring of our ICs. Finally we have used these pads in our chips (for example transceivers, opamp and regulator). In addition to implementation of these chips, we have implemented a test chip, which include our designed protection circuits and pads. By using test chip, we can test each circuit separately after implementation
  9. Keywords:
  10. Human Body ; CMOS Circuits ; Electrostatic Discharge ; Protection Circuit ; Padring

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