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Mitigating Memory Access Overhead in GPUs Through Reproduction of Intermediate Results

Barati, Rahil | 2020

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 52931 (19)
  4. University: Sharif University of Technology
  5. Department: Computer Engineering
  6. Advisor(s): Sarbazi Azad, Hamid
  7. Abstract:
  8. GPUs employ large register files to reduce the performance and energy overhead of memory accesses through improving the thread-level parallelism, and reducing the number of data movements from the off-chip memory. Recently, latency-tolerant register file (LTRF) is proposed to enable high-capacity register files with low power and area cost. LTRF is a two-level register file in which the first level is a small fast register cache, and the second level is a large slow main register file. LTRF uses a near-perfect register prefetching mechanism that warp registers are prefetched from the main register file to the register file cache before scheduling the warp, and hiding the register prefetching latency by the execution of other active warps. LTRF specifies the working-set of the warps by partitioning the control flow graph into several prefetch subgraphs, called register-interval. LTRF imposes some performance overhead due to warp stall during the register prefetching. Reducing the number of register-intervals can greatly mitigate this overhead, and improve the effectiveness of LTRF. A register-interval is a subgraph of the control flow graph (CFG) where it has to be a single-entry subgraph with a limited number of registers. We observe that the second constrain contributes more in reducing the size of register-intervals. Increasing the number of registers inside the register-interval cannot address this problem as it imposes huge performance and power overhead during the register prefetching process. In this thesis, we propose a register-interval-aware reproduction mechanism at compile-time to increase register-interval size without increasing the number of registers inside it. Our experimental results show that our proposal improves the effectiveness of LTRF by 29%, and GPU performance by 30%. Moreover, our proposal reduces GPU energy consumption by 38% , on average
  9. Keywords:
  10. General Purpose Graphic Processing Units (GPGPU) ; Execution Units ; Memory Overhead ; Value Reproduction ; Scratch Pad Memory (SPM)

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