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High precision CMOS integrated delay chain for X-Ku band applications

Ghazizadeh, M. H ; Sharif University of Technology | 2020

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  1. Type of Document: Article
  2. DOI: 10.1109/TMTT.2019.2959766
  3. Publisher: Institute of Electrical and Electronics Engineers Inc , 2020
  4. Abstract:
  5. A high-precision delay chain circuit integrated in a 0.18- mu ext{m} CMOS technology working in the frequency bandwidth of 8-18 GHz has been designed and tested. The designed delay control integrated circuit with 5-bit delay control provides a maximum delay of 125 ps and has a delay resolution of 3.9 ps. Measured delay error of the fabricated chip is less than 9.3%, making it a considerably accurate delay control circuit. Low delay-error performance has resulted from incorporating a novel delay cell in this delay chain circuit. This newly proposed delay cell is a lumped-element coupled transmission line loaded with a second-order all-pass network (APN). The APN-loaded coupled line delay cell has larger delay-bandwidth product and is less prone to parasitic capacitances of inductor elements compared with conventional passive second-order APN delay cells. The fabricated chip utilizing the novel delay cell occupies an area of 0.9 imes3.6 mm2 and consumes 115.5- and 13.5-mW dc power from a 3.3-V voltage supply in its high- and low-power modes, respectively. © 1963-2012 IEEE
  6. Keywords:
  7. All-pass network (APN) ; Artificial transmission line (ATL) ; CMOS ; Delay error ; Integrated delay chain circuit ; Bandwidth ; Capacitance ; CMOS integrated circuits ; Allpass networks ; CMOS technology ; Coupled transmission line ; Delay bandwidth ; Fabricated chips ; Frequency band width ; Low power modes ; Parasitic capacitance ; Delay circuits
  8. Source: IEEE Transactions on Microwave Theory and Techniques ; Volume 68, Issue 4 , 2020 , Pages 1553-1563
  9. URL: https://ieeexplore.ieee.org/document/8949745