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FPGA-Based Implementation of Deep Learning Accelerator with Concentration on Intrusion Detection Systems

Fard, Ebrahim | 2021

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 54098 (19)
  4. University: Sharif University of Technology
  5. Department: Computer Engineering
  6. Advisor(s): Jahangir, Amir Hossein
  7. Abstract:
  8. Intrusion Detection System (IDS) is an equipment destined to provide computer networks security. In recent years, Machine Learning and Deep Neural Network (DNN) methods have been considered as a way to detect new network attacks. Due to the huge amounts of calculations needed for these methods, there is a need for high performance and parallel or specific processors, such as Application Specific Integrated Circuit (ASIC), Graphical Processor Unit (GPU) and Field-Programmable Gate Array (FPGA). The latter seems more suitable than others due to its higher configurability and lesser power consumption. The goal of this study is the acceleration of a DNN-based IDS on FPGA. In this study, which is one of the few Intrusion Detection Systems implemented on PYNQ platform, a DNN-based IDS is described in details. Then, by identifying speed bottlenecks and time-consuming sections, and using methods such as pipelining, parallelism, customizing suitable structure for DNN operations, and utilizing chip hardware resources, a coprocessor is designed and implemented to run the neural network. Based on the results of this study, a speedup of 37 is achieved compared to Nvidia GeForce GTX 1070 Ti GPU. Also, the measured power consumption of the chip and the evaluation board are 0.934 and 8.17 watts, respectively, which is a significant enhancement compared to relevant GPU
  9. Keywords:
  10. Intrusion Detection System ; Deep Neural Networks ; Hardware Accelerator ; Field Programmable Gate Array (FPGA) ; PYthon for zyNQ (PYNQ)

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