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    Design of Adaptive Interleaver in Wireless Communication

    , M.Sc. Thesis Sharif University of Technology Alidadi, Afsoon (Author) ; Golestani, Jamaloddin (Supervisor)
    Abstract
    Generally to deal with errors in communication systems, two methods have been proposed: FEC and ARQ. In FEC, redundancy bits are added to the data that causes detection and correction of certain error patterns. ARQ method is based on retransmission of information if there is an error in the information. Another method, which is called Hybrid-ARQ, is the combination of these two methods; there are two types of TypeI and TypeII for this category. In typeI, number of redundancy bits in consecutive transmissions of one codeword is constant but in typeII, number of redundancy bits of a codeword increases in subsequent retransmissions.
    To deal with burst errors, we can use interleaving along... 

    Content Based Mammogram Image Retrieval Based on the Multiclass Visual Problem

    , M.Sc. Thesis Sharif University of Technology Siyahjani, Farzad (Author) ; Fatemizadeh, Emad (Supervisor)
    Abstract
    In recent years there has been a great effort to enhance the computer-aided diagnosis systems, Since expertise elicited from past resolved cases plays an important role in medical applications, and images acquired from various cases have a great contribution to diagnosis of the abnormalities, Content based medical image retrieval has become an active research area for many scientists. In this project we proposed a new framework to retrieve visually similar images from a large database, in which visual similarity is regarded as much as the semantic category relevance, we used optimized wavelet transform as the multi-resolution analysis of the images and extracted various statistical SGLDM... 

    Improvement in Distributed Storage by Using Network Coding

    , M.Sc. Thesis Sharif University of Technology Garshasbi, Javad (Author) ; Jafari Siavoshani, Mahdi (Supervisor)
    Abstract
    Cloud and distributed storage systems can provide large-scale data storage and high data reliability by adding redundancy to data. Redundant data may get lost due to the instability of distributed systems such as hardware failures. In order to maintain data availability, it is necessary to regenerate new redundant data in another node, referred to as a newcomer and this process reffered to repair process. Repair process is expected to be finished as soon as possible, because the regeneration time can influence the data reliability and availability of distributed storage systems. In this context, the general objective is to minimize the volume of actual network traffic caused by such... 

    Exploring and Constructing Multipartite Entangled States

    , Ph.D. Dissertation Sharif University of Technology Raissi, Zahra (Author) ; Karimipour, Vahid (Supervisor) ; Memarzadeh, Laleh (Co-Advisor)
    Abstract
    Entanglement is considered to be one of the characteristic traits of quantum mechanics. Besides it plays a key role in quantum information science, being a resource for most of its applications such as quantum communication and quantum computation. The characterization (of different forms) of entanglement and its quantification play a central role in developing entanglement theory. By considering this fact, we describe a method for finding polynomial invariants under LOCC for a system of delocalized fermions shared between different parties, with global particle-number conservation as the only constraint. These invariants can be used to construct entanglement measures for different types of... 

    On Dinur’s Proof of the PCP Theorem

    , M.Sc. Thesis Sharif University of Technology Afshari, Behnam (Author) ; Daneshgar, Amir (Supervisor)
    Abstract
    The PCP theorem is the result of a line of work on interactive proofs and probabilistically checkable proofs. The first theorem relating standard proofs and probabilistically checkable proofs is NEXP?PCP[poly(n),poly(n)] . Subsequently, the method used in the proof of this statement were extended to yield a proof of the PCP theorem. However, this proof is relatively long and complicated. The PCP theorem is equivalent to hardness of approximation of some optimization problems. In 2006, Irit Dinur discovered a different proof of the PCP theorem. Dinur’s proof is a rather shorter and simpler than original proof. The main purpose of this survey is to present the main concepts and tools used in... 

    Improving the Reliability of the STT-RAM Caches Against Transient Faults

    , M.Sc. Thesis Sharif University of Technology Azad, Zahra (Author) ; Miremadi, Ghassem (Supervisor)
    Abstract
    Cache memories occupy a large portion of processors chip area. According to academic and industrial reports, the dominant effect of leakage current in less than 40-nm technology nodes has led to serious challenges in scalability and energy consumption of SRAM and DRAM memories. To overcome this challenge, different types of non-volatile memories have been introduced. Among them, Spin-Transfer Torque Random Access Memory (STT-RAM) memory is known as the best candidate to replace SRAM in the cache memories, due to its high density and low access latency. Despite their advantages over SRAMs, several problems in STT-RAM need to be addressed to make it applicable in cache memories. The most... 

    Reliability Improvement of On-chip Memories

    , Ph.D. Dissertation Sharif University of Technology Farbeh, Hamed (Author) ; Miremadi, Ghasem (Supervisor)
    Abstract
    Reliability, performance, and energy consumption are among the most important constraints that should be satisfied in modern processors design. More than 60% of the chip area is occupied by on-chip SRAM memories and they not only contribute in a large fraction of energy consumption, but also are the most error-prone components. Radiation-induced soft errors in on-chip memories are a major concern in modern processors design. Although Single Event Upsets (SEUs) have been known to be the main concern regarding SRAM memory reliability over the past decades, with the continued downscaling of technology, the occurrence rate of Multiple-Bit Upsets (MBUs) is comparable to that of SEUs in today’s... 

    A Scheme for Counterfeit Chip Detection Using Scan Chain

    , M.Sc. Thesis Sharif University of Technology Hashemi, Mona (Author) ; Hesabi, Shahin (Supervisor)
    Abstract
    With constant increase in the rate of VLSI circuits manufactured in sites separate from the designers and computer architects, global concern regarding the possibility of integration of malware by the manufacturing foundries has arisen. Particularly, one main issue that affects relability of the chips is modifications or additions with malicious intension, known as Harware Trojans, which are easily applicable during design and manufacturing phase of chip. This study intends to introduce a model based on the scan chain, a method is provided for intellectual property protection. Currently available IP protection solutions are usually limited to protect single FPGA configurations and require... 

    STAIR: high reliable STT-MRAM aware multi-level I/O cache architecture by adaptive ECC allocation

    , Article 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020, 9 March 2020 through 13 March 2020 ; 2020 , Pages 1484-1489 Hadizadeh, M ; Cheshmikhani, E ; Asadi, H ; ACM Special Interest Group on Design Automation (SIGDA); et al.; European Design and Automation Association (EDAA); European Electronic Chips and Systems Design Initiative (ECSI); IEEE Council on Electronic Design Automation (CEDA); SEMI Strategic Technology Community and Electronic System Design Alliance (ESD Alliance) ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2020
    Abstract
    Hybrid Multi-Level Cache Architectures (HCAs) are promising solutions for the growing need of high-performance and cost-efficient data storage systems. HCAs employ a high endurable memory as the first-level cache and a Solid-State Drive (SSD) as the second-level cache. Spin-Transfer Torque Magnetic RAM (STT-MRAM) is one of the most promising candidates for the first-level cache of HCAs because of its high endurance and DRAM-comparable performance along with non-volatility. However, STT-MRAM faces with three major reliability challenges named Read Disturbance, Write Failure, and Retention Failure. To provide a reliable HCA, the reliability challenges of STT-MRAM should be carefully addressed.... 

    Smooth projective hash function from codes and its applications

    , Article IEEE Transactions on Services Computing ; 2021 ; 19391374 (ISSN) Koochakshooshtari, M ; Aref, M. R ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2021
    Abstract
    Nowadays, Smooth Projective Hash Functions (SPHFs) play an important role in constructing cryptographic tools such as secure Password-based Authenticated Key Exchange (PAKE) protocol in the standard model, oblivious transfer, and zero-knowledge proofs. Specifically, in this paper, we focus on constructing PAKE protocol; that is, a kind of key exchange protocol which needs only a low entropy password to produce a cryptographically strong shared session key. In spite of relatively good progress of SPHFs in applications, it seems there has been little effort to build them upon quantum-resistant assumptions such as lattice-based cryptography and code-based cryptography to make them secure... 

    Robin: incremental oblique interleaved ECC for reliability improvement in STT-MRAM caches

    , Article Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 21 January 2019 through 24 January 2019 ; 2019 , Pages 173-178 ; 9781450360074 (ISBN) Cheshmikhani, E ; Farbeh, H ; Asadi, H ; ACM SIGDA; Cadence Design Systems, Inc.; CEDA; EIC; IEEE CAS; IPSJ ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2019
    Abstract
    Spin-Transfer Torque Magnetic RAM (STT-MRAM) is a promising alternative for SRAMs in on-chip cache memories. Besides all its advantages, high error rate in STT-MRAM is a major limiting factor for on-chip cache memories. In this paper, we first present a comprehensive analysis that reveals that the conventional Error-Correcting Codes (ECCs) lose their efficiency due to data-dependent error patterns, and then propose an efficient ECC configuration, so-called ROBIN, to improve the correction capability. The evaluations show that the inefficiency of conventional ECC increases the cache error rate by an average of 151.7% while ROBIN reduces this value by more than 28.6x. © 2019 Association for... 

    Reliable video transmission using codes close to the channel capacity

    , Article IEEE Transactions on Circuits and Systems for Video Technology ; Volume 16, Issue 12 , 2006 , Pages 1550-1556 ; 10518215 (ISSN) Dianat, R ; Marvasti, F ; Ghanbari, M ; Sharif University of Technology
    2006
    Abstract
    Long Reed-Solomon codes over the prime field GF(216 + 1) are proposed as a low overhead channel code for reliable transmission of video over noisy and lossy channels. The added redundancy is near optimal from the information theoretic point of view contrary to the conventionally used intra-coding and sync (marker) insertion in video transmission that are not justified theoretically. Compared to known source-channel coding methods, we have achieved the quality of the output of source coder by providing nearly error free transmission. (By nearly error free we mean an arbitrarily small error probability.) The price paid for such remarkable video quality improvement and relatively low complexity... 

    PSP-Cache: A low-cost fault-tolerant cache memory architecture

    , Article Proceedings -Design, Automation and Test in Europe, DATE ; 2014 ; ISSN: 15301591 ; ISBN: 9783981537024 Farbeh, H ; Miremadi, S. G ; Sharif University of Technology
    Abstract
    Cache memories constitute a large fraction of processor chip area and are highly vulnerable to soft errors caused by energetic particles. To protect these memories, most of the modern processors employ Error Detection Codes (EDCs) or Error Correction Codes (ECCs). EDCs/ECCs impose significant overheads in terms of area and energy; these overheads increase as a function of interleaving EDCs/ECCs to detect/correct multiple errors. This paper proposes a new cache architecture to minimize the area and energy overheads of EDCs/ECCs in set-associative L1-caches. Simulation results for a 4-way set-associative cache show that the proposed architecture reduces both the area and static power overheads... 

    PKC-PC: A variant of the McEliece public-key cryptosystem based on polar codes

    , Article IET Communications ; Volume 14, Issue 12 , 2020 , Pages 1883-1893 Hooshmand, R ; Koochak Shooshtari, M ; Aref, M. R ; Sharif University of Technology
    Institution of Engineering and Technology  2020
    Abstract
    Polar codes are novel and efficient error-correcting codes with low encoding and decoding complexities. These codes have a channel-dependent generator matrix, which is determined by the code dimension, code length and transmission channel parameters. A variant of the McEliece public-key cryptosystem based on polar codes, called the PKC-PC, is studied. Since the structure of the polar codes' generator matrix depends on the parameters of the channel, the authors have used an efficient approach to conceal their generator matrix. The proposed approach is based on a random selection of rows of the matrix by which a random generator matrix is constructed. Using the characteristics of polar codes... 

    Performance analysis of non-coherent multicarrier frequency-hopping code division multiple-access systems: Uncoded and coded schemes

    , Article 2004 IEEE International Symposium on Spread Spectrum Techniques and Applications, ISSSTA 2004, Sydney, 30 August 2004 through 2 September 2004 ; 2004 , Pages 305-309 Yazdi, Z. Z ; Nasiri Kenari, M ; Sharif University of Technology
    2004
    Abstract
    In this paper, the multiuser performance of a multicarrier frequency-hopping (MC-FH)CDMA system employing non-coherent detection is evaluated. We derive the bit error rate of the system for both uncoded and coded systems in AWGN and slowly frequency-selective Rayleigh fading channel, based on Gaussian distribution assumption for the decision variable. We use a practical low-rate convolutional error correcting code, which does not require any extra bandwidth further than what is needed by the uncoded scheme. Our numerical results indicate that the coded scheme significantly outperforms the uncoded scheme in both AWGN and fading channels. Furthermore, it is observed that the performance... 

    Performance analysis of multicarrier frequency-hopping (MC-FH) code-division multiple-access systems: Uncoded and coded schemes

    , Article IEEE Transactions on Vehicular Technology ; Volume 53, Issue 4 , 2004 , Pages 968-981 ; 00189545 (ISSN) Ebrahimi, M ; Nasiri Kenari, M ; Sharif University of Technology
    2004
    Abstract
    In this paper, we provide multiuser performance analysis of a multicarrier frequency-hopping (MC-FH) code-division multiple-access system as first introduced in the work of Lance and Kaleh. We propose to use a practical low-rate convolutional error-correcting code in this system, which does not require any additional bandwidth than what is needed by the frequency-hopping spread-spectrum modulation. We provide multiuser exact performance analysis of the system for both uncoded and coded schemes in additive white Gaussian noise and fading channels for a single-user correlator receiver. We also derive the performance analysis of the system based on a Gaussian distribution assumption for... 

    ORIENT: organized interleaved ECCs for new STT-MRAM caches

    , Article Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018 ; Volume 2018-January , 19 April , 2018 , Pages 1187-1190 ; 9783981926316 (ISBN) Azad, Z ; Farbeh, H ; Hosseini Monazzah, A. M ; Sharif University of technology
    Institute of Electrical and Electronics Engineers Inc  2018
    Abstract
    Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM) is a promising alternative to SRAM in cache memories. However, STT-MRAMs face with high probability of write errors due to its stochastic switching behavior. To correct the write errors, Error-Correcting Codes (ECCs) used in SRAM caches are conventionally employed. A cache line consists of several codewords and the data bits are selected in such a way that the maximum correction capability is provided based on the error patterns in SRAMs. However, the different write error patterns in STT-MRAM caches leads to inefficiency of conventional ECC configurations. In this paper, first we investigate the efficiency of ECC configurations... 

    Optimal quantum error correcting codes from absolutely maximally entangled states

    , Article Journal of Physics A: Mathematical and Theoretical ; Volume 51, Issue 7 , 2018 ; 17518113 (ISSN) Raissi, Z ; Gogolin, C ; Riera, A ; Acin, A ; Sharif University of Technology
    Institute of Physics Publishing  2018
    Abstract
    Absolutely maximally entangled (AME) states are pure multi-partite generalizations of the bipartite maximally entangled states with the property that all reduced states of at most half the system size are in the maximally mixed state. AME states are of interest for multipartite teleportation and quantum secret sharing and have recently found new applications in the context of high-energy physics in toy models realizing the AdS/CFT-correspondence. We work out in detail the connection between AME states of minimal support and classical maximum distance separable (MDS) error correcting codes and, in particular, provide explicit closed form expressions for AME states of n parties with local... 

    On endurance of erasure codes in SSD-based storage systems

    , Article Computer Architecture and Digital Systems (CADS), 17th CSI International Symposium on ; Article number 6714239 , 2013 , Pages 67-72 ; 9781479905621 Alinezhad Chamazcoti, S. (Saeideh) ; Miremadi, Gh. (Sayyed Ghassem) ; Asadi, H. (Hossein) ; Sharif Univesity of Technology
    Abstract
    The wear-out of flash-based Solid-State Drives (SSDs) is a main concern that significantly affects their reliability. One major parameter that accelerates SSD wear-out is the number of write-cycles committed to flash chips. The number of write-cycles in SSD-based disk subsystem is highly dependent on the erasure code implemented in Redundant Array of Independent Disks (RAIDs). In this paper, we investigate the impact of erasure codes and the configuration of storage subsystems (i.e., the number of disks participated in the RAID array and stripe unit size) on the endurance of storage systems. The number of write-cycles is considered as a metric to evaluate the endurance of storage system. We... 

    Multiple-access performance analysis of combined time-hopping and spread-time CDMA system in the presence of narrowband interference

    , Article IEEE Transactions on Vehicular Technology ; Volume 58, Issue 3 , 2009 , Pages 1315-1328 ; 00189545 (ISSN) Shayesteh, M. G ; Nasiri Kenari, M ; Sharif University of Technology
    2009
    Abstract
    We consider a combined time-hopping (TH) and spread-time (ST) multiple-access technique that uses an internal code. In this method, the duration of each bit is divided into Ns frames. The outputs of the encoder and a pseudorandom (PN) sequence specify the number of the frame in which the data bit is transmitted in ST code-division multiple-access (ST-CDMA) form using the second PN sequence. We consider the correlator receiver, followed by the channel decoder. We obtain the performance of the combined method in additive white Gaussian noise (AWGN) and fading channels in the presence of multiple-access interference (MAI) and narrowband interference (NBI). We also consider the conventional...