Sharif Digital Repository

The development of extremely-constrained embedded systems having sensitive nodes such as RFID tags and nanosensors necessitates the use of lightweight block ciphers. Nevertheless, providing the required security properties does not guarantee their reliability and hardware assurance when the architectures are prone to natural and malicious faults. In this letter, error detection schemes for lightweight block ciphers are proposed with the case study of XTEA (eXtended TEA). Lightweight block ciphers such as XTEA, PRESENT, SIMON, and the like might be better suited for low-resource deeply-embedded systems compared to the Advanced Encryption Standard. Three different error detection approaches... 

Cache memories constitute a large fraction of processor chip area and are highly vulnerable to soft errors caused by energetic particles. To protect these memories, most of the modern processors employ Error Detection Codes (EDCs) or Error Correction Codes (ECCs). EDCs/ECCs impose significant overheads in terms of area and energy; these overheads increase as a function of interleaving EDCs/ECCs to detect/correct multiple errors. This paper proposes a new cache architecture to minimize the area and energy overheads of EDCs/ECCs in set-associative L1-caches. Simulation results for a 4-way set-associative cache show that the proposed architecture reduces both the area and static power overheads... 

The extended Euclidean algorithm (EEA) is an important scheme for performing the division operation in finite fields. Many sensitive and security-constrained applications such as those using the elliptic curve cryptography for establishing key agreement schemes, augmented encryption approaches, and digital signature algorithms utilize this operation in their structures. Although much study is performed to realize the EEA in hardware efficiently, research on its reliable implementations needs to be done to achieve fault-immune reliable structures. In this regard, this paper presents a new concurrent error detection (CED) scheme to provide reliability for the aforementioned sensitive and... 

The secure hash algorithm (SHA)-3 has been selected in 2012 and will be used to provide security to any application which requires hashing, pseudo-random number generation, and integrity checking. This algorithm has been selected based on various benchmarks such as security, performance, and complexity. In this paper, in order to provide reliable architectures for this algorithm, an efficient concurrent error detection scheme for the selected SHA-3 algorithm, i.e., Keccak, is proposed. To the best of our knowledge, effective countermeasures for potential reliability issues in the hardware implementations of this algorithm have not been presented to date. In proposing the error detection... 

A passive universal image steganalysis method is proposed that is shown to be of higher detection accuracy than existing truly blind steganalysis methods including Farid's and the WAM. This is achieved by improving some weaknesses of Farid's steganalysis scheme in feature extraction, that is, instead of deriving an over-determined equation system for each sub band of the wavelet decomposition, the sub bands are divided into overlapping blocks and an over-determined equation system is constructed for each block. To guarantee the existence of finite answers, the over-determined equation systems are solved in a way different from Farid's by using Moore-Penrose pseudo-inverse concept. Further... 

This paper proposes an efficient concurrent error detection method using control flow checking for embedded processors. The proposed method is based on the co-operation of two hardware modules: 1) an on-chip hardware component to detect branch instructions and generate signatures for the running program, and 2) an external watchdog processor to compare runtime signatures and branch addresses with the information extracted offline. The proposed method is implemented on an embedded processor core and is evaluated by a simulation based statistical fault injection approach where faults are injected into cache and main memory. Experimental results show that the proposed method detects more than... 

In this paper, an iterative method is proposed to jointly cancel multi-user interference and clipping noise in uplink Multi-Carrier Code Division Multiple Access (MC-CDMA) systems. Clipping is the simplest method to overcome high peak-to-average power ratio of multi-carrier signals but it makes the signals distorted. Reconstruction methods use non-distorted samples to reconstruct distorted samples in the receiver but multi-user interference causes the methods do not work properly because all the received samples are distorted due to clipping and interference and so there is no undistorted samples to be used in recovering clipped samples. On the other hand, multi-user interference... 

Nowadays, the use of multimedia services such as video sequences is constantly growing. Unfortunately, due to the lack of reliable communication channels and video data sensitivity to transmission errors, the quality of received video might decrease. Therefore, decoder error concealment methods have been developed to retrieve the damaged or lost data. In this paper, a novel temporal error concealment (TEC) algorithm based on moment invariants is presented. It includes three main stages of: designation of candidate motion vectors (MVs) set, adaptive determination of block size in the current and reference frames for feature extraction, and error function calculation based on moment... 

This paper presents an optimum pre-filter for ICA based multi-input multi-output OFDM system. In our former work, we presented a pre-filter solution for multiuser reconstruction in ICA based MIMO-OFDM systems [1,2]. Here, based on the structure of the system and former pre-filter solution, an optimization problem has been designed to give us the optimum pre-filter. The designed problem is based on minimization of the estimation error of ambiguities inherent to ICA in reconstruction of the data after separation. The optimization problem is mathematically solved and a set of optimized coefficients are obtained. Among the obtained set as optimum coefficients, optimum coefficients are acquired... 

This paper presents an Optimum pre-filter for ICA based mulit-input multi-output OFDM System. In our former work, we presented a pre-filter solution for multiuser reconstruction in ICA based MIMO-OFDM systems [1], [2]. Here, based on the structure of the system and former prefilter solution, an optimization problem has been designed to give us the optimum pre-filter. The designed problem is based on minimization of the estimation error of ambiguities inherent to ICA in reconstruction of the data after separation. The optimization problem is mathematically solved and a set of optimized coefficients are obtained. Among the obtained set as optimum coefficients, optimum coefficients are acquired... 

Increasing use of commercial off-the-shelf (COTS) superscalar processors in industrial, embedded, and real-time systems necessitates the development of error detection mechanisms for such systems. This paper presents an error detection scheme called Committed Instructions Counting (CIC) to increase error detection in such systems. The scheme uses internal Performance Monitoring features and an external watchdog processor (WDP). The Performance Monitoring features enable counting the number of committed instructions in a program. The scheme is experimentally evaluated on a 32-bit Pentium® processor using software implemented fault injection (SWIFI). A total of 8181 errors were injected into... 

In this paper, general form of optimum distribution free (D.F.) detector for noncoherent radars is extracted. This general form is very complex to be analyzed, therefore, we have derived two special cases and one case which is more interesting and practical is analyzed accurately. We have shown that in spite of its simple form, the detector has considerable benefits over conventional OSCFAR schemes  

This paper presents a behavior-based error detection technique called Control Flow Checking using Branch Trace Exceptions for PowerPC processors family (CFCBTE). This technique is based on the branch trace exception feature available in the PowerPC processors family for debugging purposes. This technique traces the target addresses of program branches at run-time and compares them with reference target addresses to detect possible violations caused by transient faults. The reference target addresses are derived by a preprocessor from the source program. The proposed technique is experimentally evaluated on a 32-bit PowerPC microcontroller using software implemented fault injection (SWIFI).... 

To enhance the error detection capability in COTS (commercial off-the-shelf) -based design of safety-critical systems, a new hardware-based control flow checking (CFC) technique will be presented. This technique, Control Flow Checking by Execution Tracing (CFCET), employs the internal execution tracing features available in COTS processors and an external watchdog processor (WDP) to monitor the addresses of taken branches in a program. This is done without any modification of application programs, therefore, the program overhead is zero. The external hardware overhead is about 3.5% using an Altera Flex 10K30 FPGA. For different workload programs, the execution time overhead and the error... 

This paper analyzes the problem of transient-error recovery of several protecting techniques used in fault-tolerant cache memories. In this paper, reliability and mean-time-to-failure (MTTF) equations for several protecting techniques are derived and estimated. The results of the considered techniques are compared with those of cache memories without redundancies and with only parity codes in both tag and data arrays of caches. Depending on the error rate under which a cache memory will operate, and the size of the cache memory, one of the analyzed cases could be used. If the transient-error rate is very small or the size of cache memory is relatively small, then a protected with only single...