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    A new model for robust facility layout problem [electronic resource]

    , Article Information Sciences, Elsevier ; Volume 278, 10 September 2014, Pages 498–509 Neghabi, H. (Hossein) ; Eshghi, Kourosh ; Salmani, Mohammad Hassan ; Sharif University of Technology
    Abstract
    The Facility Layout Problem (FLP) is the problem of locating each department in a long plant floor without any overlap between departments in order to minimize the material handling cost. The main purpose of this study is to show the effectiveness of a robust approach to solve FLP. In this study, it is assumed that the departments’ length and width are not predetermined. For modeling this kind of uncertainty, the size of each department is considered as a bounded variable and two new parameters are also introduced to implement a robust approach. Moreover, a new adaptive algorithm is designed to determine the robust layout with respect to the decision makers’ requirements. Furthermore, the... 

    Wind farm layout optimization using imperialist competitive algorithm

    , Article Journal of Renewable and Sustainable Energy ; Vol. 6, Issue. 4 , July , 2014 ; ISSN: 19417012 Kiamehr, K ; Hannani, S. K ; Sharif University of Technology
    Abstract
    In this work, the wind farm layout optimization problem is dealt with using a new approach. The aim of wind farm layout optimization is to maximize the output power of a wind farm considering the wake losses. Layout optimization minimizes the wake losses regarding the location of the turbines. Three different wind scenarios with different wind direction angles, wind direction blowing probabilities, and Weibull distribution parameters are assumed. Since, the problem is nonlinear and constrained, imperialist competitive algorithm is used as a modern and powerful algorithm for continuous optimization problems. The optimization outcomes indicate that imperialist competitive algorithm yields... 

    An optimal time algorithm for minimum linear arrangement of chord graphs

    , Article Information Sciences ; Volume 238 , 2013 , Pages 212-220 ; 00200255 (ISSN) Raoufi, P ; Rostami, H ; Bagherinezhad, H ; Sharif University of Technology
    2013
    Abstract
    A linear arrangement φ of an undirected graph G = (V, E) with |V| = n nodes is a bijective function φ:V → {0, ..., n - 1}. The cost function is cost(G,φ)=∑uv∈E|(φ(u)-φ(v))| and opt(G) = min∀φcost(G, φ). The problem of finding opt(G) is called minimum linear arrangement (MINLA). The Minimum Linear Arrangement is an NP-hard problem in general. But there are some classes of graphs optimally solvable in polynomial time. In this paper, we show that the label of each node equals to the reverse of binary representation of its id in the optimal arrangement. Then, we design an O(n) algorithm to solve the minimum linear arrangement problem of Chord graphs  

    A layout-based approach for multiple event transient analysis

    , Article Proceedings - Design Automation Conference ; 2013 ; 0738100X (ISSN) ; 9781450320719 (ISBN) Ebrahimi, M ; Asadi, H ; Tahoori, M. B ; Sharif University of Technology
    2013
    Abstract
    With the emerging nanoscale CMOS technology, Multiple Event Transients (METs) originated from radiation strikes are expected to become more frequent than Single Event Transients (SETs). In this paper, a fast and accurate layout- based Soft Error Rate (SER) estimation technique with consideration of both SET and MET fault models is pro- posed. Unlike previous techniques in which the adjacent MET sites are obtained from logic-level netlist, we perform a comprehensive layout analysis to extract MET adjacent cells. It is shown that layout-based technique is the only effective solution for identification of adjacent cells as netlist-based techniques significantly underestimate the overall SER.... 

    A 1-mW current reuse quadrature RF front-end for GPS L1 band in 0.18μm CMOS

    , Article 2012 19th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2012, Seville, Seville, 9 December 2012 through 12 December 2012 ; 2012 , Pages 157-160 ; 9781467312615 (ISBN) Jalili, H ; Fotowat Ahmady, A ; Jenabi, M ; Sharif University of Technology
    2012
    Abstract
    A new low-power current reuse topology is proposed for the GPS receiver's RF front-end that combines the higher conversion gain and suppressed noise figure characteristics of cascade structures with the low power consumption of stacked architectures. The presented circuit, called 1.5-stage LMV cell, consists of LNA, Mixer and VCO (LMV) in such a formation that boosts LNA gain and suppresses mixer's noise figure by cascading the two stages while reusing their currents in the two stacked quadrature VCOs and placing the mixer's upper tree switches at the vicinity of on-off regions. The circuit is designed and its layout is generated in TSMC 0.18μm CMOS technology. Post-layout simulations using... 

    Modelling and improvement of non-standard queuing systems: A gas station case study

    , Article International Journal of Applied Decision Sciences ; Volume 4, Issue 4 , 2011 , Pages 324-340 ; 17558077 (ISSN) Teimoury, E ; Yazdi, M. M ; Haddadi, M ; Fathi, M ; Sharif University of Technology
    Abstract
    This research has modelled a queuing system with no standard states. In order to analyse these systems, some parameters such as the mean of waiting time and the length of queue are computed. These situations usually occur when there is delay in the service, for example, in the gas queuing system that cars are unable to leave after receiving the required services due to the presence of other cars in front of them. These kinds of non-standard queuing systems are usually applied to the assembly and production lines. In this paper, a queuing model for the special non-standard state queuing system is developed to be used in gas stations. The proposed model is implemented in fuel stations in Iran... 

    A 1.93 pA/√Hz transimpedance amplifier for 2.5 Gb/s optical communications

    , Article Proceedings - IEEE International Symposium on Circuits and Systems ; 2011 , Pages 2889-2892 ; 02714310 (ISSN) ; 9781424494736 (ISBN) Shahdoost, S ; Medi, A ; Saniei, N ; Sharif University of Technology
    Abstract
    A state-of-the-art low-noise transimpedance amplifier (TIA) for 2.5 Gb/s family is presented using IBM 0.13-m CMOS technology. This TIA would be a part of a homodyne detector in a quantum key distribution (QKD) system. In this work a thorough design methodology based on a novel analytical noise optimization is presented. Also a unique method for eliminating the DC current of the input photodiodes (PDs) is proposed. The post-layout simulation results show bandwidth of 52 kHz to 1.9 GHz, average input referred noise of 1.93 pA/√Hz, and transimpedance gain of 80 db while dissipating 12 mW from a 1.5 V power supply, including the output buffer  

    Constructing a block layout by face area

    , Article International Journal of Advanced Manufacturing Technology ; Volume 54, Issue 5-8 , 2011 , Pages 801-809 ; 02683768 (ISSN) Jokar, M. R. A ; Sangchooli, A. S ; Sharif University of Technology
    2011
    Abstract
    Solving the facility layout problems by graph theory consists of two stages. In the first stage, a planar graph that specifies desired adjacencies is obtained and in the second stage, a block layout is achieved from the planar graph. In this paper, we introduce face area as a new concept for constructing a block layout. Based on this idea, we present a new algorithm for constructing block layout from a maximal planar graph (MPG). This MPG must be generated from deltahedron heuristic. Constructed block layout by this algorithm satisfies all of adjacency and area requirements  

    Robust Optimization of Integrated Model of Facility Location and Scheduling

    , M.Sc. Thesis Sharif University of Technology Imanpoor Yourdshahy, Mona (Author) ; Modarres Yazdi, Mohammad (Supervisor)
    Abstract
    In facility location problem with uncertain data, some model parameters such as demand or transportation time are not known in advance and in many cases, no historical information exists to derive their probability distribution functions. In this situation, robust optimization is a prevalent approach. In this study, to apply robust optimization in our model, first we review its concepts and methods. Then, a mathematical model for a new facility location problem, as well as its robust counterpart is developed. Furthermore, we also develop a model for simultaneous decision making regarding facility location problem and sequencing. In this model, it is also assumed the process times are... 

    Robust Multi-floor Layout Problem

    , M.Sc. Thesis Sharif University of Technology Izadinia, Niloufar (Author) ; Eshghi, Kourosh (Supervisor)
    Abstract
    Facility Layout Problem is one of the classic problems with the goal of arranging facilities with respect to the objective function and it’s been the subject of many researches for many years. By progressive development of industrial units in recent years and the lack of space especially in major cities, using multi-floor buildings can be a suitable solution. In literature, a few researches on this kind of layout problems are done. Maybe the main reason is difficulties of modeling. In this problem, with regard to objective function, interior and between floors flow and some predefined constraints, a suitable floor and place for each facility or department is determined. On the other hand, in... 

    Integrated Location-Allocation and Scheduling Model

    , M.Sc. Thesis Sharif University of Technology Karamyar, Fatemeh (Author) ; Modarres Yazdi, Mohammad (Supervisor)
    Abstract
    Location-allocation problem is known as one of the classical problems in industrial engineering. The goals of these problems are finding optimal location of facilities and assigning these facilities to service demands from a given set of point. Location-allocation decisions are widespread through all organization in the world concerning private and public businesses. Therefore, in this study, a practical mathematical model is formulated and solved.In this paper we present a new approach for a budgeted constraint capacitated location-allocation problem integrated with cellular layout approach containing cell formation and group scheduling. Main decisions are composed of formation of... 

    A Decision Analysis for Production Layout Selection

    , M.Sc. Thesis Sharif University of Technology Rooygari, Homa (Author) ; Eshghi, Kourosh (Supervisor)
    Abstract
    Studying the major effects of facility layout on competitive abilities has been a field of interest for researchers. Selection of production layout is amongst the most important decisions because it has a major role on the efficiency of a company like the ability of quick respond to customers’ diverse needs.
    In this study we intend to obtain a ranking of production layouts considering agility in production which leads to responding quickly to the diversity of demand. Considering the nature of a decision making problem, we use PSI method. This is a multi attribute decision making method in which there is no need for considering the relative importance between the attributes. The main... 

    Applying Ant Colony Optimization for Solving Facility Layout Problem with Unequal Area and Flexible Bay Structure

    , M.Sc. Thesis Sharif University of Technology Famil Farnia, Farid (Author) ; Akhavan Niaki, Taghi (Supervisor)
    Abstract
    In this thesis a model of mixed integer programming to find the optimal solution of bi-objective facility layout problem in flexible bay structure according to uncertainty in flow material among departments and closeness rating is represented. In a facility layout problem based on flexible bay structure, departments with unequal areas are allocated to parallel bays. Also each department can only be allocated in one bay. The Goals are to minimize material handling cost and to maximize closeness rating. Uncertainty in flow material and closeness rating are modeled by fuzzy numbers. Due to the high complexity of the presented model, exact methods are only able to respond to maximize of 9... 

    A bi-objective MIP model for facility layout problem in uncertain environment

    , Article International Journal of Advanced Manufacturing Technology ; Volume 81, Issue 9-12 , 2015 , Pages 1563-1575 ; 02683768 (ISSN) Salmani, M. H ; Eshghi, K ; Neghabi, H ; Sharif University of Technology
    Abstract
    Facility layout problem (FLP) is one of the classical and important problems in real-world problems in the field of industrial engineering where efficiency and effectiveness are very important factors. To have an effective and practical layout, the deterministic assumptions of data should be changed. In this study, it is assumed that we have dynamic and uncertain values for departments’ dimensions. Accordingly, each dimension changes in a predetermined interval. Due to this assumption, two new parameters are introduced which are called length and width deviation coefficients. According to these parameters, a definition for layout in uncertain environment is presented and a mixed integer... 

    Elimination of the effect of bottom-plate capacitors in C-2C DAC using a layout technique

    , Article Microelectronics Journal ; Volume 46, Issue 12 , 2015 , Pages 1275-1282 ; 00262692 (ISSN) Khorami, A ; Sharifkhani, M ; Sharif University of Technology
    Abstract
    An efficient layout technique is proposed to eliminate the effect of the bottom-plate capacitors in a C-2C Digital to Analog Converter (DAC). Using this technique, the bottom-plate capacitors of 2C capacitors in the C-2C structure are placed in parallel with 1C capacitors. Then, the effect of the bottom plate capacitors is nulled by modifying the size of the main 1C capacitors. Hence, avoiding the complexity of calibration, this technique can preclude the effect of the bottom-plate to ground capacitance. Statistical simulations prove that the proposed technique is robust to non-ideal effects such as mismatch or parasitic capacitors. A 10-bit C-2C DAC is modeled in COMSOL Multiphysics using... 

    A new linear adjacency approach for facility layout problem with unequal area departments

    , Article Journal of Manufacturing Systems ; Volume 37, Part 1 , October , 2015 , Pages 93-103 ; 02786125 (ISSN) Ghassemi Tari, F ; Neghabi, H ; Sharif University of Technology
    Elsevier  2015
    Abstract
    In this study a new version of adjacency, which provides a more flexible layout design, is proposed. In the proposed version, departments which are nonadjacent yet close to each other are considered to be adjacent with a smaller adjacency rating. It is shown that the proposed adjacency is a generalized version of the traditional adjacency. A mathematical programming model is developed for the proposed facility layout problem. To show the flexibility and efficacy of the proposed model, a computational study is conducted. The solution of an illustrative example as well as the solutions of several test problems, reveal flexibility and efficacy of the proposed model  

    FPGA-based protection scheme against hardware trojan horse insertion using dummy logic

    , Article IEEE Embedded Systems Letters ; Volume 7, Issue 2 , 2015 , Pages 46-50 ; 19430663 (ISSN) Khaleghi, B ; Ahari, A ; Asadi, H ; Bayat-Sarmadi, S ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2015
    Abstract
    Hardware trojan horses (HTH) have recently emerged as a major security threat for field-programmable gate arrays (FPGAs). Previous studies to protect FPGAs against HTHs may still leave a considerable amount of logic resources to be misused by malicious attacks. This letter presents a low-level HTH protection scheme for FPGAs by filling the unused resources with the proposed dummy logic. In the proposed scheme, we identify the unused resources at the device layout-level and offer dummy logic cells for different resources. The proposed HTH protection scheme has been applied on Xilinx Virtex devices implementing a set of IWLS benchmarks. The results show that by employing the proposed HTH... 

    A fully analog calibration technique for phase and gain mismatches in image-reject receivers

    , Article AEU - International Journal of Electronics and Communications ; Volume 69, Issue 5 , May , 2015 , Pages 823-835 ; 14348411 (ISSN) Nikoofard, A ; Kananian, S ; Fotowat Ahmady, A ; Sharif University of Technology
    Elsevier GmbH  2015
    Abstract
    A systematic approach to I/Q mismatch calibration in image-reject receivers is presented in this paper. A new error detection algorithm is proposed, which automatically calibrates for phase and gain mismatches limiting the performance of image-reject receivers. A dual-loop feedback is employed which looks for the minimum phase/gain error using a 2-dimensional analog-based search algorithm and then finds the minimum value for the error. An experimental CMOS prototype RF front-end for cognitive radio applications operating at 400-800 MHz is proposed and simulated in the 0.18 μm CMOS technology, achieving an image rejection ratio (IRR) better than 55-dB in post-layout simulation. The... 

    Zero-power mismatch-independent digital to analog converter

    , Article AEU - International Journal of Electronics and Communications ; Volume 69, Issue 11 , 2015 , Pages 1599-1605 ; 14348411 (ISSN) Khorami, A ; Sharifkhani, M ; Sharif University of Technology
    Elsevier GmbH  2015
    Abstract
    A new switched-capacitor digital to analog converter (DAC) is presented. In this DAC, a ladder of series capacitors is used to generate the output voltage levels. A correction phase is used to increase the precision of the DAC. It is analytically shown that the proposed DAC is mismatch independent by virtue of the correction phase. That is after few correction phases (typically one), the effect of mismatch on the reference voltage levels on the ladder diminishes and an accurate voltage division is provided. It is proven that the whole process sinks no extra charge from the power supply. Furthermore, post layout simulations in 0.18 μm technology proves the benefits of the proposed method  

    An optimal approach for maximizing the number of adjacencies in multi floor layout problem

    , Article International Journal of Production Research ; Volume 53, Issue 11 , 2015 , Pages 3462-3474 ; 00207543 (ISSN) Neghabi, H ; Ghassemi Tari, F ; Sharif University of Technology
    Taylor and Francis Ltd  2015
    Abstract
    Multi-floor facility layout problem concerns the arrangement of departments on the different floors. In this paper, a new mathematical model is proposed for multi-floor layout with unequal department area. Maximising the number of useful adjacencies among departments is considered as the objective function. The adjacencies are divided into two major categories: horizontal and vertical adjacencies. The horizontal adjacency may be occurred between the departments assigned to same floors while the vertical can be happened between departments assigned to any consecutive floors. A minimum common boundary length (surface area) between any two horizontal (vertical) adjacent departments is...