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Fast, accurate, and detailed Soft Error Rate (SER) estimation of digital circuits is essential for cost-efficient reliable design. A major step to accurately estimate a circuit SER is the computation of failure probability, which requires the computation of three derating factors, namely logical, electrical, and timing derating. The unified treatment of these derating factors is crucial to obtain accurate failure probability. Existing SER estimation techniques are either unscalable to large circuits or inaccurate due to lack of unified treatment of all derating factors. In this paper, we present fast and efficient algorithms to estimate SERs of circuit components in the presence of single... 

Time-redundancy techniques are commonly used in real-time systems to achieve fault tolerance without incurring high energy overhead. However, reliability requirements of hard real-time systems that are used in safety-critical applications are so stringent that time-redundancy techniques are sometimes unable to achieve them. Standby sparing as a hardware-redundancy technique can be used to meet high reliability requirements of safety-critical applications. However, conventional standby-sparing techniques are not suitable for low-energy hard real-time systems as they either impose considerable energy overheads or are not proper for hard timing constraints. In this paper we provide a technique... 

Boost converter operating in critical conduction mode is widely used in low-power power factor corrector because of its simplicity and low switching losses. The switching loss due to parasitic capacitor discharge at the on-time instant can also be reduced by a valley switching technique. In this paper, we introduce a new driver topology for the high-side switch in a synchronous boost converter operating in the critical conduction mode to obtain full zero-voltage switching. Using the proposed high-side driver topology, the conventional control circuit is sufficient to control the low-side switch, and no additional control circuit is required to adjust the timing of the switches. Finally, the... 

In this paper, we propose a very fast and accurate analytical approach to estimate the overall SER and to identify the most vulnerable gates,flip-flops, and paths of a circuit. Using such information, designers can selectively protect the vulnerable parts resulting in lower power and area overheads that are the most important factors in embedded systems. Unlike previous approaches, the proposed approach firstly does not rely on fault injection or fault simulation; secondly it measures the SER for multi cycles of circuit operation; thirdly, the proposed approach accurately computes all three masking factors, namely, logical, electrical, and timing masking; fourthly, the effects of error... 

Chip multiprocessors (CMPs) issue write invalidations (WIs) to assure program correctness. In conventional snoop-based protocols, writers broadcast invalidations to all nodes as soon as possible. In this work we show that this approach, while protecting correctness, is inefficient due to two reasons. First, many of the invalidated blocks are not accessed after invalidation making the invalidation unnecessary. Second, among the invalidated blocks many are not accessed anytime soon, making immediate invalidation unnecessary. While invalidating the first group could be avoided altogether, the second group's invalidation could be delayed without any performance or correctness cost. Accordingly,... 

Migration to Three Dimensional Integrated Circuits (3D ICs) can provide higher scalability, higher throughput, and lower power consumption with respect to Two Dimensional Integrated Circuits (2D ICs). Also, the latency bottleneck of interconnections in 2D ICs is efficiently solved in 3D ICs. This is due to the use of Through-Silicon-Vias (TSVs) in the communication structure of 3D ICs. TSVs are among the efficient fabrication mechanisms that connect stacked layers in 3D ICs. However, proximity and large size of TSVs make them highly prone to crosstalk faults. Crosstalk faults can cause mutual undesired influences between TSVs and thus seriously threat the reliability of data transfer on... 

Time-interleaved analog to digital converters (TI-ADC) offer high sampling rates by passing the input signal through C parallel low-rate ADCs. We can achieve C-times the sampling rate of a single ADC if all the shifts between the channels are identical. In practice, however, it is not possible to avoid mismatch among shifts. Besides, the samples are also subject to jitter noise. In this paper, we propose a blind method to mitigate the joint effects of sampling jitter and shift mismatch in the TI-ADC structure. We assume the input signal to be bandlimited and incorporate the jitter via a stochastic model. Next, we derive an approximate model based on a first-order Taylor series and use an... 

Recently, an increasing concern has been raised about turn-to-turn faults (TTFs) in power transformers, because these faults can lead to severe transformer insulation failure and consequently, its outage. Generally, it is impossible to experimentally analyze the transformer behavior under such faults, since the implementation of those experiments may be substantially destructive. Therefore, computer-aided models should be developed to investigate the performance of transformer protective relays under turn-to-turn faults. So far, existing transformer models are mainly formulated to implement in the EMTP-based softwares. However, most of power system protection engineers and researchers... 

The scattering of graphene surface plasmons normally incident on a line discontinuity in graphene surface conductivity is investigated. The effect of the length of the transition region on the reflection and transmission coefficients is studied. It is shown that the reflection coefficient is reduced by widening the transition region. Based on the results obtained, a transmission line model is derived for the graphene sheet in which the discontinuity is represented by a simple circuit. This model is next used to design graphene-based bandpass and bandstop filters with arbitrary bandwidth in the terahertz regime  

This paper addresses the design of an observer based adaptive neural controller for a class of strict-feedback nonlinear uncertain systems subject to input delay, saturation and unknown direction. The input delay has been handled using an integral compensator term in the controller design. A neural network observer has been developed to estimate the unmeasured states. In the observer design, the Lipschitz condition has been relaxed. To solve the problem of unknown control directions, the Nussbaum gain function has been applied in the backstepping controller design. “The explosion of complexity” occurred in the traditional backstepping technique has been avoided utilizing the dynamic surface... 

In this report we outline the study of the development of calorimeter detectors using bright scintillating crystals. We discuss how timing information with a precision of a few tens of pico seconds and below can significantly improve the reconstruction of the physics events under challenging high pileup conditions to be faced at the High-Luminosity LHC or a future hadron collider. The particular challenge in measuring the time of arrival of a high energy photon lies in the stochastic component of the distance of initial conversion and the size of the electromagnetic shower. We present studies and measurements from test beams for calorimeter based timing measurements to explore the ultimate... 

A compact aging model for circuit simulation has been developed by considering all possible trapped carriers within MOSFETs. The hot carrier effect and the N(P)BTI effect are modeled by integrating the substrate current as well as the oxide field change due to the trapped carriers. Additionally, the carriers trapped within the highly resistive drift region are included for high-voltage (HV)-MOSFET modeling. The aging model considers the dynamic trap-density increase as a function of circuit-operation time with dynamically varying stress conditions for each individual MOSFET. A self-consistent solution is obtained by iteratively solving the Poisson equation including the trap density. The... 

The reported investigation aims at developing a compact model for circuit-aging simulation. The model considers dynamic trap-density increase during circuit operation in a consistent way. The model has been applied to an SRAM cell, where it is believed that the NBTI effect dominates. Our simulation verifies that the hot-carrier effect has a compensating influence on the NBTI aging of SRAM cells. © 2017 The Japan Society of Applied Physics  

3D imaging technologies are applied in numerous areas, including self-driving cars, drones, and robots, and in advanced industrial, medical, scientific, and consumer applications. 3D imaging is usually accomplished by finding the distance to multiple points on an object or in a scene, and then creating a point cloud of those range measurements. Different methods can be used for the ranging. Some of these methods, such as stereovision, rely on processing 2D images. Other techniques estimate the distance more directly by measuring the round-trip delay of an ultrasonic or electromagnetic wave to the object. Ultrasonic waves suffer large losses in air and cannot reach distances beyond a few... 

This letter investigates the problem of threedimensional (3-D) target localization in multiple-input multipleoutput (MIMO) radars with distributed antennas, using hybrid timedelay (TD) and angle of arrival (AOA) measurements. We propose a closed-form positioning method based on weighted least squares (WLS) estimation. The proposed estimator is shown theoretically to achieve the Cramer-Rao lower bound (CRLB) under mild noise conditions. Numerical simulations also verify the theoretical developments. IEEE  

Simulation of large-scale nonlinear dynamical systems on hardware with a high resemblance to their mathematical equivalents has been always a challenge in engineering. This paper presents a novel current-input current-output circuit supporting a systematic synthesis procedure of log-domain circuits capable of computing bilateral dynamical systems with considerably low power consumption and acceptable precision. Here, the application of the method is demonstrated by synthesizing four different case studies: 1) a relatively complex 2-D nonlinear neuron model; 2) a chaotic 3-D nonlinear dynamical system Lorenz attractor having arbitrary solutions for certain parameters; 3) a 2-D nonlinear Hopf... 

In this paper, the short-circuit fault in three-phase quasi-Z-source inverter (q-ZSI) is analyzed and a linear model is proposed for the short-circuit analysis. The proposed model is based on the state space equations of the system. By using this model, the most critical situation during short-circuit fault is recognized; the maximum reaction time for the protection system could be estimated and elements that are prone to failure are identified as well. The analysis is categorized into two groups, leg fault and switch fault. The linear model is confirmed by simulation of 1kw three-phase q-ZSI. © 2017 IEEE  

The authors propose a new design for monolayer superconducting planar flux transformer integrated with a coplanar resonator serving as a gigahertz range tank circuit for high-Tc rf-SQUID magnetometers. Based on the proposed design, which is optimized using the finite element method, the transformer-resonator configuration is made of 200-nm-thick monolayer YBCO film on a crystalline LaAlO3 substrate. In this optimized design, the SQUID magnetometer is coupled through flip-chip configuration with the configuration providing high coupling coefficient between the devices. The design permits coupling of the rf signals to the SQUID efficiently, whereas the transformer is designed to couple the dc... 

Security in mobile handsets of telecommunication standards such as GSM, Project 25 and TETRA is very important, especially when governments and military forces use handsets and telecommunication devices. Although telecommunication could be quite secure by using encryption, coding, tunneling and exclusive channel, attackers create new ways to bypass them without the knowledge of the legitimate user. In this paper we introduce a new, simple and economical circuit to warn the user in cases where the message is not encrypted because of manipulation by attackers or accidental damage. This circuit not only consumes very low power but also is created to sustain telecommunication devices in aspect... 

This paper presents an analytical model for power harvester circuits used in Ultra-low power applications. Assuming that the MOS devices of the circuit fully operate in the Sub-threshold regime in both forward and reverse regions, closed-form equations for important properties of the rectifier circuit such as output voltage, efficiency and input resistance are derived. The model includes the effect of the compensation voltage on the circuit behavior. There is a good agreement between the simulation results and the model. In addition, the contour plots needed to simultaneously optimize the matching network and the rectifier circuit are derived by the resulting equations. A 50-Stage rectifier...