Sharif Digital Repository

A 1.8-v 13-bit 25MS/S pipelined analog-to-digital (A/D) converter was designed and simulated using 0.18um CMOS technology. The proposed new high speed low power class AB opamp makes it possible to achieve requirements of 13-bit resolution and settling in 12ns within 0.01% accuracy. An optimum architecture for noise and power consideration is also selected to reduce power. Total Power dissipation is about 82 mw from a single 1.8 v supply, where INL and DNL are 0.7 LSB and 0.6 LSB respectively. SNDR of 75.5 dB is achieved  

An area and power-efficient second order sigma-delta modulator is presented. At system level, we propose a new single-loop single-stage modulator that uses only one class-AB op-amp to realize a second order noise shaping for speech band applications. The modulator shows 86 dB DR in 4 kHz speech bandwidth. It consumes 125 μw from a 2.5 V supply  

A 12 bit 25 MS/S pipelined analog-to-digital (A/D) converter was designed and simulated using 0.35 μm CMOS technology. The proposed new high speed class AB opamp makes it possible to achieve requirements of 12 bit resolution and settling in 20 ns within 0.05% accuracy. However, pipeline ADCs are tolerant to comparator's offset, but using dynamic comparators, power dissipation can be reduced. So a dynamic comparator is designed which is more power efficient. Total power dissipation is about 76 mW from a single 3 V supply, where INL and DNL are 0.8 LSB and 0.6 LSB respectively. A SNDR of 70.1 dB is achieved. © 2003 IEEE  

This paper presents a new single-loop single-stage second order sigma-delta modulator. The circuit based on switched capacitor components just uses one Op-Amp to realize second order noise shaping. The modulator demonstrated 85 dB DR in 8kHz bandwidth, dissipating 135 μW from a 2.5 V supply. © 2002 IEEE  

A Cúk converter operating in discontinuous capacitor voltage mode (DCVM) is an inherent power factor correction converter. A reduced-order switch-network model of a Cúk converter in DCVM is developed, which is valid for both dc-dc and ac-dc applications. The model can be used for controller analysis and design. Moreover, a fast dynamic response controller is proposed, which is an integration of a switching-frequency control unit and a proportional-integral (PI) controller. The PI controller is in charge of duty ratio adjustment. In the proposed controller, unlike conventional PI controllers, switching frequency is no longer fixed and varies as load changes. The switching-frequency control... 

Recent developments in improving lighting efficiency and cost reduction of LED's have caused them to be a suitable alternative for the current lighting systems. In this paper a novel off-line structure is proposed to drive LED's. The proposed circuit has a high power factor and high efficiency and a long lifetime. To increase the life time of the converter, the proposed circuit doesn't use any electrolytic capacitors in the power stage. The proposed circuit consists of a transition mode (TM) Flyback converter in order to have power factor correction (PFC). A Buck converter is added to the third winding of the Flyback transformer in order to create two paths for the electrical power. DC power... 

The Cúk converter operating in discontinuous capacitor voltage mode (DCVM) inherently benefits from PFC features as unity power factor can be achieved by using a constant duty cycle and switching frequency. In this paper, the switch network modeling technique is applied to the Cúk converter operating in DCVM in order to develop its small-signal model under the assumption that it is fed by a dc voltage source. Afterwards, the model is extended to derive the small-signal behavior of the converter while operating as a PFC converter. The validity of the proposed model is confirmed by both simulation and experimental results  

A new low-power switching procedure for stepwise capacitor chargers is presented. In this procedure, a novel displacement method is utilized to improve the speed by a factor of two while preserving energy efficiency. Moreover, the load capacitor retains its charge after the charging process finishes and permits the circuit charge another predischarged load capacitor without an efficiency degradation problem (instability). Also, the control circuit of the switching procedure is implemented using only flip-flops with no combinational logic, therefore, it systematically prevents glitch power dissipation and improves the efficiency. Analytical derivations are proposed to model the switching... 

Recent developments in improving lighting efficiency and cost reduction of LEDs have made them suitable alternatives to the current lighting systems. In this paper, a novel offline structure is proposed to drive LEDs. The proposed circuit has a high-input power factor, high efficiency, a long lifetime, and it produces no flicker. To increase the lifetime of the converter, the proposed circuit does not include any electrolytic capacitors in the power stage. The proposed circuit consists of a transition mode flyback converter in order to improve power factor. Additionally, a buck converter is added to the third winding of the flyback transformer in order to create two parallel paths for the... 

To get a more accurate model for simulation of single electron transistors (SETs), we have proposed a new macromodel that includes the ability of electron tunneling time calculation. In our proposed model, we have modified the previous models and applied some basic corrections to their formulas. In addition, we have added a switched capacitor circuit, as a quantizer, to calculate the electron tunneling time. We used HSPICE for high-speed simulation and observed that the simulation results obtained from our model matched more closely with that of SIMON 2.0. We also could evaluate the time of electron tunneling through the barrier by using the quantizer. Clearly, our macro-model gives more... 

One of the major limitations of the multilevel converters is the voltage unbalance between different levels. The techniques to balance the voltage between the different levels normally involve voltage clamping or capacitor charge and discharge control. However, traditional Flying Capacitor Converter (FCC) may be quite limited by the voltage unbalance of flying-capacitors that is the most serious problem. This paper describes operating principles of a new softswitching seven-level converter topology based on FCC for self-voltage stabilization and balancing. By adding power electronic devices to the traditional FCC topology, the proposed topology regulates the DC bus voltage and balances the... 

Sigma-Delta modulator ADCs used in signal processing applications are usually implemented by switched-capacitor (SC) circuits and CMOS transmission gates. Clock feed-through effect is one of the main non-ideal parameters existing in SC integrators degrading modulator total SNDR and its linearity. In this paper, a comprehensive analysis of clock feed-through effect on CMOS transmission gates on both rising and falling edges on output node will be presented. The main interferer parameters such as clock signal timing model, input signal level and switch parameters effect on output error will be analyzed. Finally, circuit simulations using 0.18um CMOS technology in ADS environment show the... 

Capacitors are one of the most critical components in power electronic converters, yet they are notoriously susceptible to failure. Avoiding unforeseen outages caused by capacitor failures is one of the most effective approaches to increase system availability. Therefore, a variety of methods have been proposed to monitor a capacitor health condition based on different degradation indicators. This paper proposes a new approach based on the accurate measurement of an electrolytic capacitor dissipation factor to detect its end-of-life. Since the dissipation factor is affected by both the capacitor resistance and capacitance simultaneously, it can provide more information about the health... 

The increasing use of power electronic equipment and the importance of their continuous and correct operation have attracted remarkable attention to the condition monitoring of power electronic converters. Since capacitors are the leading cause of power electronic converters failure, this paper attempts to attain a solution to monitor the condition of the DC-link capacitor in a three-phase back-to-back converter using the stimulated measurable transients. The proposed method works based on the temporary change of switching logic and the measurement of the DC-link voltage and converter input phase current transients. By processing the measured signals, the capacitance of the capacitor is... 

Cúk Converter operating in discontinuous capacitor voltage mode is an inherent PFC converter in which, unity power factor can be achieved using constant duty cycle and switching frequency. In this paper, a reduced-order switch network modeling technique is applied to Cúk converter operating in DCVM in order to derive small-signal model of the converter assuming a dc voltage source as the input source of the converter. This model is extended to derive the small-signal behavior of the converter while operating as a PFC converter. The validity of the proposed model is confirmed by both simulation and experimental results. Afterwards, a new control strategy is proposed in which switching... 

Our previously reported mathematical model for a mixed oxide nanoparticulate-based supercapacitor containing RuO2·xH2O and MO2·yH2O (M being another suitable transition metal) was analyzed. Both double-layer and faradaic processes responsible for charge/discharge were considered. The effects of the intrinsic factors, unit cell length, state of charge, and the exchange current densities of the electrochemical processes of the constituents on the performance of the model supercapacitor were clarified. Compensation effects where each constituent compensates the shortcomings of the other at specific conditions of discharge are analyzed in the light of the model  

This study proposes a new fault detection method for modular multilevel converter (MMC) semiconductor power switches. While in common MMCs, the cells capacitor voltages are measured directly for control purposes, in this study voltage measurement point changes to the cell output terminal improving fault diagnosis ability. Based on this measurement reconfiguration, a novel fault detection algorithm is designed for MMCs semiconductor power switches. The open circuit and short circuit faults are detected based on unconformity between modules output voltage and switching signals. Simulation and experimental results confirm accurate and fast operation of the proposed method in faulty cell... 

An ultra-efficient switching method for successive approximation register ADCs is proposed. In this method, the input signals are sampled in a special fashion to reduce the switching energy. Owing to the sampling method, only one reference voltage (Vq=Vref/4) is required to implement the switching steps. Therefore, in addition to reduction in the switching energy (due to the lower supply voltage), the precision of the DAC is improved. The proposed method reduces the switching energy and area by 99.41 and 50%, respectively, compared with the conventional method. © 2016 The Institution of Engineering and Technology  

A highly energy-efficient switching method for capacitor-splitting digital-to-analogue converter (DAC) in successive approximation register (SAR) analogue-to-digital converters (ADCs) is presented. In the proposed DAC, a bottom-plate sampling method is introduced which requires only one reference voltage (Vcm = 1/2Vref) during the entire DAC switching steps. Therefore, in addition to the switching energy reduction, the precision of the DAC is increased since only one reference voltage is used. The DAC average switching energy and the area are reduced by 98.44% and 50% compared with the conventional binary weighted DAC