Sharif Digital Repository

In this paper we consider the anharmonic corrections to the anisotropic elastic rod model for DNA. Our model accounts for the difference between the bending energies of positive and negative rolls, which comes from the asymmetric structure of the DNA molecule. We will show that the model can explain the high flexibility of DNA at small length scales, as well as kink formation at high deformation limit. © 2009 The American Physical Society  

Some of the recent approaches regarding leverage PCM will be reviewed in this chapter. The chapter starts with a discussion regarding future main memory systems that includes hybrid architecture schemes using both PCM and DRAM arrays. Later, we focus on PCM only approaches and this section will help describe some techniques for reducing the increased read latency because of slow writes in PCMs. In this chapter, we also illustrate wear-leveling approaches and review the security problems of this memory approach which are lifetime limited. This section includes an overview of the recent security aware wear-leveling techniques, whose methods help detect attacks, and their issues during the... 

We have presented a new method for ECG baseline correction using the adaptive bionic wavelet transform (BWT). In fact by the means of BWT, the resolution in the time-frequency domain can be adaptively adjusted not only by the signal frequency but also by the signal instantaneous amplitude and its first-order differential. Besides by optimizing the BWT parameters parallel to modifying our previous thresholding rule, one can handle ECG baseline correction. First an estimation of the baseline wandering frequency is obtained and then the adaptation can be used only in three successive scales in which the mid-scale has the closest center frequency to the estimated frequency. Thus the... 

Based on the solution of the Wigner-Boltzmann (WB) equation, quantum correction in the drift-diffusion (DD) model is proposed. The new model, which is a form of the quantum DD model, can show quantum phenomena such as tunneling and quantum repulsion. To evaluate the proposed model, potential barrier and potential wells are simulated. Simulation results show the electron tunneling through and repulsion from the potential barrier. © 2007 The Japan Society of Applied Physics  

A new reduced-order modeling approach is presented. This approach is based on fluid eigenmodes and without using the static correction. The vortex lattice method is used to analyze unsteady flows over two-dimensional airfoils and three-dimensional wings. Eigenanalysis and reduced-order modeling are performed using a conventional method with and without the static correction technique. In addition to the conventional method, eigenanalysis and reduced-order modeling are also performed using the new proposed method, that is, without static correction requirement. Numerical examples are presented to demonstrate the accuracy and computational efficiency of the proposed method. Based on the... 

In this paper, the multiuser performance of a multicarrier frequency-hopping (MC-FH)CDMA system employing non-coherent detection is evaluated. We derive the bit error rate of the system for both uncoded and coded systems in AWGN and slowly frequency-selective Rayleigh fading channel, based on Gaussian distribution assumption for the decision variable. We use a practical low-rate convolutional error correcting code, which does not require any extra bandwidth further than what is needed by the uncoded scheme. Our numerical results indicate that the coded scheme significantly outperforms the uncoded scheme in both AWGN and fading channels. Furthermore, it is observed that the performance... 

In this paper, we provide multiuser performance analysis of a multicarrier frequency-hopping (MC-FH) code-division multiple-access system as first introduced in the work of Lance and Kaleh. We propose to use a practical low-rate convolutional error-correcting code in this system, which does not require any additional bandwidth than what is needed by the frequency-hopping spread-spectrum modulation. We provide multiuser exact performance analysis of the system for both uncoded and coded schemes in additive white Gaussian noise and fading channels for a single-user correlator receiver. We also derive the performance analysis of the system based on a Gaussian distribution assumption for... 

Increasing use of commercial off-the-shelf (COTS) superscalar processors in industrial, embedded, and real-time systems necessitates the development of error detection mechanisms for such systems. This paper presents an error detection scheme called Committed Instructions Counting (CIC) to increase error detection in such systems. The scheme uses internal Performance Monitoring features and an external watchdog processor (WDP). The Performance Monitoring features enable counting the number of committed instructions in a program. The scheme is experimentally evaluated on a 32-bit Pentium® processor using software implemented fault injection (SWIFI). A total of 8181 errors were injected into... 

A 12 bit 25 MS/S pipelined analog-to-digital (A/D) converter was designed and simulated using 0.35 μm CMOS technology. The proposed new high speed class AB opamp makes it possible to achieve requirements of 12 bit resolution and settling in 20 ns within 0.05% accuracy. However, pipeline ADCs are tolerant to comparator's offset, but using dynamic comparators, power dissipation can be reduced. So a dynamic comparator is designed which is more power efficient. Total power dissipation is about 76 mW from a single 3 V supply, where INL and DNL are 0.8 LSB and 0.6 LSB respectively. A SNDR of 70.1 dB is achieved. © 2003 IEEE  

H∞ controller order reduction with stability and performance preservation pose unique challenges to designers. In the paper, an approach for controller order reduction based on minimization of the rank of a matrix variable, subject to linear matrix inequality constraints, is presented. In this approach, the rank of a residue matrix of a high-order controller subject to the error between the loop gain of the closed-loop nominal system and the loop gain of the closed-loop system with the reduced order controller is minimized. However, since solving this matrix rank minimization problem is very difficult, the rank objective function is replaced with the nuclear-norm that can be reduced to a... 

In this paper, we consider using practical low-rate error correcting codes in fiber-optic code division multiple-access (CDMA) communication systems. To this end, a different method of low-rate channel coding is proposed. As opposed to the conventional coding schemes, this method does not require any further bandwidth expansion for error correction in fiber-optic CDMA communication systems. The low-rate channel codes that are used for demonstrating the capabilities of the proposed method are super-orthogonal codes. These codes are near optimal and have a relatively low complexity. We evaluate the upper bounds on the bit-error probability of the proposed coded fiber-optic CDMA system assuming... 

A Cúk converter operating in discontinuous capacitor voltage mode (DCVM) is an inherent power factor correction converter. A reduced-order switch-network model of a Cúk converter in DCVM is developed, which is valid for both dc-dc and ac-dc applications. The model can be used for controller analysis and design. Moreover, a fast dynamic response controller is proposed, which is an integration of a switching-frequency control unit and a proportional-integral (PI) controller. The PI controller is in charge of duty ratio adjustment. In the proposed controller, unlike conventional PI controllers, switching frequency is no longer fixed and varies as load changes. The switching-frequency control... 

Recent developments in improving lighting efficiency and cost reduction of LEDs have made them suitable alternatives to the current lighting systems. In this paper, a novel offline structure is proposed to drive LEDs. The proposed circuit has a high-input power factor, high efficiency, a long lifetime, and it produces no flicker. To increase the lifetime of the converter, the proposed circuit does not include any electrolytic capacitors in the power stage. The proposed circuit consists of a transition mode flyback converter in order to improve power factor. Additionally, a buck converter is added to the third winding of the flyback transformer in order to create two parallel paths for the... 

In this paper, a novel zero-voltage-switching topology for power factor correction bridgeless boost rectifier is proposed. By employing an improved switch cell, ZVS for all the main switches is achieved without additional current or voltage stress. The zero-current-switching is also provided for the auxiliary switch. In all modes of operation of this converter, the input current flows through only two semiconductors. Therefore, conduction loss of this converter is as low as the conventional parent converter. With these features, the efficiency of the proposed converter is very high. A 500 W prototype is designed and simulated to verify the system performance  

Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM) is a promising alternative to SRAM in cache memories. However, STT-MRAMs face with high probability of write errors due to its stochastic switching behavior. To correct the write errors, Error-Correcting Codes (ECCs) used in SRAM caches are conventionally employed. A cache line consists of several codewords and the data bits are selected in such a way that the maximum correction capability is provided based on the error patterns in SRAMs. However, the different write error patterns in STT-MRAM caches leads to inefficiency of conventional ECC configurations. In this paper, first we investigate the efficiency of ECC configurations... 

Hybrid Multi-Level Cache Architectures (HCAs) are promising solutions for the growing need of high-performance and cost-efficient data storage systems. HCAs employ a high endurable memory as the first-level cache and a Solid-State Drive (SSD) as the second-level cache. Spin-Transfer Torque Magnetic RAM (STT-MRAM) is one of the most promising candidates for the first-level cache of HCAs because of its high endurance and DRAM-comparable performance along with non-volatility. However, STT-MRAM faces with three major reliability challenges named Read Disturbance, Write Failure, and Retention Failure. To provide a reliable HCA, the reliability challenges of STT-MRAM should be carefully addressed....