Sharif Digital Repository

An important approach to reduce power dissipation is reducing the number of instructions executed by the processor. To achieve this goal, this paper introduces a novel instruction scheduling algorithm that executes an instruction only when its result is required by another instruction. In this manner, it not only does not execute useless instructions, but also reduces the number of instructions executed after a mispredicted branch. The cost of the extra hardware is 161 bytes for 128 instruction window size. Measurements done using SPEC CPU 2000 benchmarks show that the average number of executed instructions is reduced by 13.5% while the average IPC is not affected. Copyright 2008 ACM  

In this paper, the axiomatic design is introduced for designing the power electronic converters. The main idea of axiomatic design is to introduce variables affecting the desired performances of the system most independently possible. The design process is presented for a Buck converter. ©2008 IEEE  

In this paper, the axiomatic design is introduced for controlling a power electronic converter. The main idea of axiomatic design is to introduce variables affecting the desired performances of the system most independently possible. The control process is presented for a Buck converter to achieve constant efficiency and output voltage ripple. ©2008 IEEE  

This paper presents a power flow controller for a matrix converter as the power electronic interface between a high-speed micro-turbine generator and a utility distribution system. The matrix converter converts the high-frequency of a micro-turbine generator to a conventional frequency of the utility system, based on a novel switching strategy. The controller regulates magnitude and phase-angle of the converter output voltage to accommodate real and reactive power flow requirements of the utility system. Performance of the matrix converter based microturbine generation system including the power flow controller is evaluated based on digital time-domain simulation studies in the PSCAD/EMTDC... 

In this paper, we propose a run-time strategy for managing writes onto last level cache in chip multiprocessors where STT-RAM memory is used as baseline technology. To this end, we assume that each cache set is decomposed into limited SRAM lines and large number of STT-RAM lines. SRAM lines are target of frequently-written data and rarely-written or read-only ones are pushed into STT-RAM. As a novel contribution, a low-overhead, fully-hardware technique is utilized to detect write-intensive data blocks of working set and place them into SRAM lines while the remaining data blocks are candidates to be remapped onto STT-RAM blocks during system operation. Therefore, the achieved cache... 

FPGAs are interesting choices for control of power electronics converters and electrical drives. In this paper, implementation of the control method of a reduced switch- count five-leg converter is carried out. Two PWM methods are studied. For verification of the implemented controller in a practical manner, without risking the damaging of the real system, "FPGA in the loop" experiments are performed. It is shown that using the proposed methodology, FPGA implementation and verification is fast and effective. The provided results show the high performance of the implemented controller on the FPGA, therefore the feasibility and suitability of the FPGA for this application is approved  

In this paper, we propose a run-time strategy for managing writes onto last level cache in chip multiprocessors where STT-RAM memory is used as baseline technology. To this end, we assume that each cache set is decomposed into limited SRAM lines and large number of STT-RAM lines. SRAM lines are target of frequently-written data and rarely-written or read-only ones are pushed into STT-RAM. As a novel contribution, a low-overhead, fully-hardware technique is utilized to detect write-intensive data blocks of working set and place them into SRAM lines while the remaining data blocks are candidates to be remapped onto STT-RAM blocks during system operation. Therefore, the achieved cache... 

Depending on the application in which power electronic converters (PECs) are deployed, failure processes may endanger the desirable performance of PECs. This paper offers holistic insights on reliability modeling of PECs considering dependencies in two simultaneous failure processes, namely gradual wearing-out degradation and vibration sudden degradation. While sudden and gradual degradation processes may individually affect the useful lifetime of PECs, their mutual interdependencies could significantly accelerate the aging mechanisms. A new analytical model for reliability assessment of PECs is proposed that can capture such mutual interdependence of simultaneous failure processes. The... 

In this paper, by extending Space Vector Modulation (SVM) technique to three-phase four-wire systems, a new strategy is developed for the control of Active Power Filters (APFs). It is shown that the conventional SVM method cannot compensate for the current in the neutral wire in a three-phase four wire system. Simulations have been performed using PSCAD/EMTDC software. Simulation results are provided to prove the ability of the proposed technique in compensating the zero-sequence current. ©2006 IEEE  

In this paper, a flux search controller is proposed to increase the efficiency of a direct torque controlled induction motor with light load. The reference flux value is determined through a two stage minimization algorithm with the amplitude of the stator current as the objective function. In the transient state, a great flux step is used to speed up the convergence. In the steady state, a noise cancellation algorithm is used to let using small flux step and improves the steady state behavior of flux controller. Simulation and experimental confirm the fast dynamics of the proposed method and its superiority compared to the other optimal flux search controllers. © 2005 IEEE  

A flux search controller is proposed to achieve the best efficiency in a direct torque controlled induction motor with light load. The reference flux value is determined through a minimization algorithm with stator current as objective function. Experimental results show that using motor current instead of motor input power as the objective function causes better performance. © 2004 IEEE  

The flux and torque hysteresis bands are the only gains to be adjusted in direct torque control (DTC). The torque ripple and harmonic loss of motor and switching loss of inverter greatly Influence them. Hence, these variables must be observed in the control process to maximize performance of the system. In this paper, the effects of flux and torque hysteresis bands on inverter switching loss, harmonic loss, and torque ripple of induction motor are investigated. In order to find their optimum values, a cost function consisting motor harmonic losses, torque ripples, and inverter switching losses is defined. Minimizing this cost function leads to the optimum value of the hysteresis bands of... 

This paper proposes a model-based design approach for microgrids considering the aging of power electronic devices under different operating conditions. The proposed approach takes into account the physics of failure mechanisms in converter components as the failure prone devices in power systems. Furthermore, it considers the impacts of load profile on the aging of converter components and system performance. This approach facilitates accurate and optimized design of power electronic-based microgrids. According to this approach fragile links of power converters for a specified application can be identified. Moreover, the weakest converters based on their function in the microgrid can be... 

The increasing use of power electronic equipment and the importance of their continuous and correct operation have attracted remarkable attention to the condition monitoring of power electronic converters. Since capacitors are the leading cause of power electronic converters failure, this paper attempts to attain a solution to monitor the condition of the DC-link capacitor in a three-phase back-to-back converter using the stimulated measurable transients. The proposed method works based on the temporary change of switching logic and the measurement of the DC-link voltage and converter input phase current transients. By processing the measured signals, the capacitance of the capacitor is... 

This paper presents a high performance real-time simulator for power electronic systems applications and primarily intended for controller hardware-in-the-loop (CHIL) testing. The novelty of the proposed simulator resides in the massively parallel hardware architecture that efficiently exploits fine-grained parallelism without imposing severe communication overhead time that can limit the performance. The simulator enables the use of a nanosecond range simulation timestep to simulate power electronic systems. Through the use of this nanosecond range simulation timestep, the simulator minimizes the error arising from the intersimulation timestep switching phenomenon associated with CHIL. The... 

In this paper, an optimal down sampler is used for Associate Discrete Circuit (ADC) based modeling and simulation of basic switching converters. Characteristic equation of backward Euler based discrete model of the circuit is used to find the value for down sampling. Using ADC modeling, fixed admittance matrix can be achieved for modeling switching converters and using down sampler, additional switch and diode current oscillations are minimized. Real-time digital simulation of buck converter using ADC with down sampler method is implemented on a Field Programmable Gate Array (FPGA) and the results are those expected without additional numerical oscillations. Based on the place-and-route... 

Nowadays, reduced switch rectifiers are more interested because of less expense. Control of these rectifiers is an important part of their designing process. In this paper, a method is proposed for four-switch rectifier to continue working under unbalanced input voltage. To achieve this goal, first a method is introduced to separate positive and negative sequences of dq components. Also, the necessary condition is determined. Considering this condition, the control method is modified and new reference value for the control signals is calculated. Finally, the system is simulated in Simulink and the results are provided. These results confirm the accuracy of the developed model, and also the... 

In this paper, a biologically motivated controller based on a mammalian limbic system called Brain Emotional Learning Based Intelligent Controller (BELBIC) is used for speed control of a Digital Servo System. The proposed controller is applied experimentally to a laboratory Digital Servo System 1 via MATLAB external mode. Comparing results of the proposed controller with conventional PID controller shows satisfactory performance including faster response and lower overshoot