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tabandeh--mahmoud
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Design and Implementation of a Tunable Frequency Channelizer on FPGA
, M.Sc. Thesis Sharif University of Technology ; Tabandeh, Mahmoud (Supervisor)
Abstract
Nowdays, many of communication systems working together. The fist part of each communication system is related to separating a desired part of system input signal. This is called channelisation. Channelization is a process where single, few, or all channels from a certain frequency band are separated for further processing. The separation of single channel is usually done by down-conversion followed by filtering and optional sample-rate conversion. A straightforward implementation for multi channel sepration, which is also the traditional implementation of wideband channelizer, is to simply use a single-channel channelizer for each channel. A few applications require that an input signal be...
Reducing Semantic Gap in Content-Based Image Retrieval Systems Using Graph Cuts and Fuzzy Relevance Feedback
,
M.Sc. Thesis
Sharif University of Technology
;
Tabandeh, Mahmoud
(Supervisor)
Abstract
Multimedia retrieval systems are gradually playing a critical role in our everyday life to facilitate interacting with massive amount of personal or professional images, music and video archives. So far, many systems have been proposed among them relevance feedback based content based multimedia (especially image) retrievals has been proved to be more effective. However there is still a problem called semantic gap, in finding proper mapping between low-level features used by CBIR systems and user’s high-level concepts. On the other hand graph cuts have been a great powerful tool for solving many computer vision problems. They benefit from robust optimization algorithm called maximum flow/...
A Survey and Practical Comparison of Top Techniques on Fault tolerant CPU Design
, M.Sc. Thesis Sharif University of Technology ; Tabandeh, Mahmoud (Supervisor)
Abstract
Confronting with cosmic rays in electronic parts of space systems, especially in processors and their peripherals, has always been noteworthy topic. By decreasing the aspects of transistors and their voltages, fault occurrence problem in digital integrated circuits not only has been increased in space systems, but also infects on mission critical systems that work at ground level. Since there are many reports about the effect of high energy particles, like neutrons which are present in earth atmosphere, in sub-100 nm digital circuits.In this thesis we are discussing about architecture level techniques for hardening processors against soft errors of radiation.It has been done for each part of...
Wireless Sensor Network in Biosystem
, M.Sc. Thesis Sharif University of Technology ; Tabandeh, Mahmoud (Supervisor) ; Jahed, Mehran (Supervisor)
Abstract
This research presents an efficient thermal-aware routing protocol based on Shortest Hop Routing algorithms for implanted bi medical sensor network. Implanted biomedical sensor networks provide a major application of sensor networks in the near future. These in-vivo sensor nodes collect desired biometric data and communicate the data wirelessly to a base-station through a multi-hop network. They generate the heat due to wireless communication and circuitry power consumption. A high temperature of the in-vivo nodes for a prolonged period might damage the surrounding tissues. Most of the protocols for sensor networks don’t take the thermal issue as a factor in the routing of packets. In its...
Providing Methods for Reducing and Estimating the Power Consumption of Wireless Networks on Chip
, M.Sc. Thesis Sharif University of Technology ; Tabandeh, Mahmoud (Supervisor) ; Rahemi, Bijan (Supervisor)
Abstract
In recent years, the possibility of building large systems on chip, called SoC is provided. By scaling the technology, designing Socs will face numerous challenges. The Noc paradigm, has resolved many of the SoC’s problems, by deploying network properties in the structures of on chip interconnections. Today, with advances in the semiconductor industry, we can implement broadband wireless antennas, which are integrated on chip. Such NoCs are called WNoC. Due to immaturity of WNoCs, there still exist big challenges, providing routing algorithm and controlling shared medium via MAV layers, for them. In this project, we will provide a routing algorithm based on tag switching, and then, after...
Visual Event Recognition and Description
, M.Sc. Thesis Sharif University of Technology ; Gholampour, Iman (Supervisor) ; Tabandeh, Mahmoud (Supervisor)
Abstract
Increasing needs for traffic video surveillance and intelligent video analysis is a hot topic that has attracted significant interests in recent days. Scene understanding is one of the most important aspects of an intelligent video surveillance system. Statistics shows that rate of vehicle accidents has been continuously increasing over the past years. This necessitates the need for efficient traffic analysis and abnormality detection systems. It is desirable to develop fully automated surveillance systems, with which people will be free from boring monitoring tasks. In this thesis our goal is to describe and detect abnormal event like accident or variation of traffic density in traffic...
Fault Tolerant Routing in Wireless Network on Chip
, Ph.D. Dissertation Sharif University of Technology ; Tabandeh, Mahmoud (Supervisor) ; Raahemi, Bijan (Co-Advisor)
Abstract
Network-on-Chip (NoC) as a promising design approach for on-chip interconnect fabrics could overcome the energy as well as synchronization challenges of the conventional interconnects in the gigascale System-on-Chips (SoC). The advantage of communication performance of traditional wired NoC will no longer be continued by the future technology scaling. Packets that travel between distant nodes of a large scale wired on-chip network significantly suffer from energy dissipation and latency due to the routing overhead at each hop. According to the ITRS annual report, the RFCMOS characteristics will be steadily improved by technology scaling. As the operating frequency of RF devices increases,...
Circuit Level Techniques for Soft Error Mitigation in Combinational and Sequential Parts in Nano-scale CMOS Technology
, Ph.D. Dissertation Sharif University of Technology ; Tabandeh, Mahmoud (Supervisor) ; Fazeli, Mahdi (Co-Advisor)
Abstract
CMOS technology has reached two digit nanometer dimensions. This scaling trend improves performance and power consumption on the one hand, and reduces noise margin and circuits reliability on the other. Along with downscaling, sensitivity to radiation induced soft errors is increasing. As CMOS dimensions are shrinking, node capacitance of circuits become smaller. Consequently, particles with smaller charge could induce parasitic voltages in some nodes and result in soft errors. There are more particles with smaller charge than the ones with larger. Therefore, soft error rate is rapidly increasing with technology advances. Single Event Multiple Effects (SEMEs) is a new challenge emerged in...
Traffic Videos Content Analysis Based on Topic Models
, Ph.D. Dissertation Sharif University of Technology ; Tabandeh, Mahmoud (Supervisor) ; Gholampour, Iman (Co-Advisor)
Abstract
Motion pattern analysis in traffic videos can be directly employed for scene analysis, rule mining, abnormal event detection, traffic phase detection, etc. The most successful and newest methods for complex traffic scene analysis are based on topic models. Topic models have been developed for text processing and as they have not been yet optimized for traffic video processing, they are still far away from optimal efficiency. In this thesis, firstly we propose two unsupervised methods for traffic video analysis based on non-probabilistic topic models. In the first proposed method, we use Group Sparse Topical Coding (GSTC) and an improved version of it for learning typical motion patterns...
Optimization and Verification of Arithmetic Circuits under Different Levels of Abstraction
, M.Sc. Thesis Sharif University of Technology ; Tabandeh, Mahmoud (Supervisor) ; Alizadeh, Bijan (Supervisor)
Abstract
Arithmetic circuits are considered as very important blocks of datapaths in microprocessor structures. Due to the high importance of these circuits, several optimization approaches in different levels of abstraction have been proposed for them. These approaches can be implemented by either software or manually by digital logic designers. As within this optimization process, specially, in manual approaches, the probability of introducing logic bugs in the circuit is high, it would then be necessary to make use of verification and debugging techniques for the designed circuits. One of the classic verification methods is simulation. This approach is not suitable for large designs and it does...
RT-Level Test Pattern Generation with Horner Expansion Model
, Ph.D. Dissertation Sharif University of Technology ; Tabandeh, Mahmoud (Supervisor) ; Navabi, Zainalabedin (Co-Advisor)
Abstract
Increasing in size and complexity of digital designs has made manufacturing process more complex and enforces more complexity in verification of designs. This makes it essential to address critical verification issues at the early stages of design cycle. Such a complicated designs needs to be tested for fabrication faults as well as functional faults. Several attempts have been made to raise the quality of testing methods with automatic test pattern generation (ATPG) and design for testability (DFT) methods in logic and lower levels. Although these techniques try to increase the testability of a circuit considerably, but there are always some overheads in area, power and performance....
System Level Communication Testing Considering Functionality
, M.Sc. Thesis Sharif University of Technology ; Tabandeh, Mahmoud (Supervisor) ; Navabi, Zainalabedin (Co-Advisor)
Abstract
Due to the development of electronics, technology has entered new levels of integration on a single chip, called the System-on-Chip (SoC) design. Currently a SoC may contain various Intellectual Property (IP) cores with different interface protocols. For typical SoC communication, designers implement numerous standards such as Avalon from Altera and AMBA from ARM. These standards have different topologies with their own properties and are suitable for specific applications, But the challengeable problem is testing interconnects between cores. In testing process, important elements of a bus that should be tested are interconnections between cores (wires), multiplexers, arbiters, decoders, and...
Exploiting Bandpass Sampling and Compressed Sensing Alghorithms for RF to Digital Direct Conversion
, M.Sc. Thesis Sharif University of Technology ; Tabandeh, Mahmoud (Supervisor) ; Pezeshk, Amir Mansour (Co-Advisor)
Abstract
The target of reconnaissance receivers is to detect radio frequencies and pulses present in the environment and extracting their characteristics. To receive the signals in the range of 2 to 18 GHz, different receptors can be used. Each receptor has its specific aplications, advantages and disadvantages. In this project, we proposed a receptor scheme with the following features: 1-simple hardware, 2-ability to detect simultaneous signals, 3-hundred percent probability of intercept (POI), 4-high input bandwidth and 5-rapid threat detection. To have such a receptor, we should move data processing parts of receptor to digital domain as much as possible, and reduce the amount of analog...
Application of Karnaugh map for easy generation of error correcting codes
, Article Scientia Iranica ; Volume 19, Issue 3 , June , 2012 , Pages 690-695 ; 10263098 (ISSN) ; Sharif University of Technology
2012
Abstract
With increasing use of data transmission between digital systems as well as subsystems, the need for more reliable communication is felt. In this research, a new approach to the linear error correcting codes is introduced. Among advantages of this technique are simpler code construction and also decoding algorithm, as well as easier understanding of the basic concept. Based on an earlier paper and also recent work done, we first discuss briefly the use of Karnaugh map and its advantages in constructing simple codes. We then prove a theorem on application of the map to multiple error correcting codes. Using these results, we propose a simple technique that leads to obtaining a code with more...
Optimization of higher order pulse shapers used for reduction of noise in amplifier circuits
, Article Scientia Iranica ; Volume 12, Issue 1 , 2005 , Pages 75-82 ; 10263098 (ISSN) ; Sharif University of Technology
Sharif University of Technology
2005
Abstract
Active components in amplifiers generate noise. Thus, amplifiers too, produce noise at their output and, therefore, increase the input signal to noise ratio. This is an undesirable feature, more particularly when one is dealing with weak input signals already combined with noise. Thus, reducing amplifiers' noise becomes a necessity for some applications. To overcome this problem, one approach consists of improving electronic device technology. Another approach is the use of advanced techniques in designing low noise amplifiers by taking advantage of pulse shapers. Pulse shapers generally consist of calculated filters made of integrator(s) and differentiator(s) that limit properly the...
Design and Implementation of an Audio Steganography System on FPGA
, M.Sc. Thesis Sharif University of Technology ; Tabandeh, Mahmood (Supervisor)
Abstract
In recent years, along with development of technology and decrease in size of digital devices, copying and editing of digital multimedia products has become easier. Also, broadband technology caused simpler distribution of data. Considering above mentioned problems, we can use watermarking. Nowadays, watermarking has many applications such as secure transmission of data, owner identification, proof of ownership, authentication, broadcast monitoring etc. Watermarking is the process of hiding information in a secure host, in a way that it does not change the quality of signal. Watermarking is the science and art of hiding secret information in which neither the sender nor the receiver would...
A new two-stage topic model based framework for modeling traffic motion patterns
, Article 10th Iranian Conference on Machine Vision and Image Processing, MVIP 2017 ; Volume 2017-November , April , 2018 , Pages 276-280 ; 21666776 (ISSN) ; 9781538644041 (ISBN) ; Gholampour, I ; Tabandeh, M ; Sharif University of technology
IEEE Computer Society
2018
Abstract
Analyzing motion patterns in traffic videos can be exploited directly to generate high-level descriptions of the video content. The most recent and successful unsupervised methods for complex traffic scene analysis are based on topic models. In this paper, a new two-stage framework is proposed for traffic motion pattern extraction based on topic models. This framework forces the topic model to learn known meaningful motion patterns in traffic scenes. Latent Dirichlet Allocation (LDA) is employed as the topic model. Experimental results show that our proposed framework finds the motion patterns more efficiently and gives a meaningful representation for the video. © 2017 IEEE
Differential effects of fonf and fonfs on learning english lax vowels in an efl context
, Article Journal of Asia TEFL ; Volume 16, Issue 2 , 2019 , Pages 499-515 ; 17383102 (ISSN) ; Moinzadeh, A ; Barati, H ; Sharif University of Technology
Asian Association of Teachers of English as a Foreign Language
2019
Abstract
This study investigated the differential effects of focus-on-form (FonF: explicit instruction followed by focused tasks) and focus-on-forms (FonFS: explicit instruction followed by controlled exercises) on learning English lax vowels (i.e., /ɪ/, /ʊ/, /ʌ/) by Persian English as a foreign language (EFL) learners. To this end, 48 learners took a voluntary 6-hour course: the experimental group (n = 17) received FonF, the comparison group (n = 16) received FonFS, and the control group (n = 15) engaged in theme-based discussions with no focus on the target vowels. Learners’ pronunciations were elicited in controlled read-aloud and spontaneous picture description tasks and acoustically measured for...
Cluster-based sparse topical coding for topic mining and document clustering
, Article Advances in Data Analysis and Classification ; Volume 12, Issue 3 , 2018 , Pages 537-558 ; 18625347 (ISSN) ; Gholampour, I ; Tabandeh, M ; Sharif University of Technology
Springer Verlag
2018
Abstract
In this paper, we introduce a document clustering method based on Sparse Topical Coding, called Cluster-based Sparse Topical Coding. Topic modeling is capable of improving textual document clustering by describing documents via bag-of-words models and projecting them into a topic space. The latent semantic descriptions derived by the topic model can be utilized as features in a clustering process. In our proposed method, document clustering and topic modeling are integrated in a unified framework in order to achieve the highest performance. This framework includes Sparse Topical Coding, which is responsible for topic mining, and K-means that discovers the latent clusters in documents...
Cluster-based sparse topical coding for topic mining and document clustering
, Article Advances in Data Analysis and Classification ; 2017 , Pages 1-22 ; 18625347 (ISSN) ; Gholampour, I ; Tabandeh, M ; Sharif University of Technology
2017
Abstract
In this paper, we introduce a document clustering method based on Sparse Topical Coding, called Cluster-based Sparse Topical Coding. Topic modeling is capable of improving textual document clustering by describing documents via bag-of-words models and projecting them into a topic space. The latent semantic descriptions derived by the topic model can be utilized as features in a clustering process. In our proposed method, document clustering and topic modeling are integrated in a unified framework in order to achieve the highest performance. This framework includes Sparse Topical Coding, which is responsible for topic mining, and K-means that discovers the latent clusters in documents...