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- Type of Document: M.Sc. Thesis
- Language: Farsi
- Document No: 39132 (19)
- University: Sharif University of Technology
- Department: Computer Engineering
- Advisor(s): Hessabi, Shahin
- Abstract:
- With progress in integrated circuits technology, on chip systems have become operational, and after that, onchip network are as solutions to improve onchip connections and also its scalability. With improving technology, the number of cores on chips can be more, that it causes increasing importance of produced problems by parallel links. Serial links are one of the methods to decrease these problems. Serial links have some advantages in compare with parallel links in some aspects like: clock pulse skew, cross talk, area cost, difficulties in wiring and synchronizing clock pulse signals. But any way, problems such as high operational frequency and complicated serializer and deserializer parts limit use of them . In this thesis context, advantages and disadvantages of serial and parallel links are stated and then, some implementations for serial links are introduced. At the end, the structure of network onchip, used in this thesis, will be explained. Two synchronized methods are implemented for serial transferring in network onchips in the 65nm technology. In one of these methods, the links among routers are being serialized, and in the other one, the structure of on chip network is implemented serially. The analysis of results is done by power comparison in three states of parallel, serial link and serial. To analyze, some standards like packet generation rate and type of injected data to network and also Bus width in parallel state are considered
- Keywords:
- Network-on-Chip (NOC) ; Power ; On Chip System ; Parallel Link ; Serial Link
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