Loading...

Mosayyebzadeh, Amin | 2011

740 Viewed
  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 41850 (19)
  4. University: Sharif University of Technology
  5. Department: Computer Engineering
  6. Advisor(s): Hessabi, Shahin
  7. Abstract:
  8. Three dimensional or vertical integration is a new way of increasing the performance and expanding the capacities of modern integrated circuits. Using this technology, 3D Networks on Chip has been proposed as one of the novel research fields and has been receiving a lot of attention. 3D Networks on chip have a lot of benefits such as capability of large scale integration, increasing the density of elements on chip and expanding the dimensions of chips. Large scale integration and increasing density of elements will cause more consumption of energy. This more energy consumption will cause high temperature in chips. Although high temperature has been managed in 2D networks, but necessity of precise control on heat in 3D networks is essential. Suitable mapping of the tasks on cores, in a manner that heat has been distributed all over of chip and the cores which are near to heat sink have more tasks, is one of heat control methods. Mapping of tasks which have data interchanging, to cores which are near to each other, would decrease communication latency and power consumption. In order to this, in this research, we will try this method using fussy logic. Fussy logic proposes a flexible, simple and understandable solution that we can change weight of every agent in this solution according to chips needs. As we will see, proposed model would decrease power consumption, average communication latency and average temperature of cores
  9. Keywords:
  10. Network-on-Chip (NOC) ; Task Mapping ; Fuzzy Logic ; Three Dimensional Integration

 Digital Object List

 Bookmark

No TOC